diff options
| author | Catalin Marinas <catalin.marinas@arm.com> | 2008-12-01 09:54:57 -0500 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2008-12-01 09:54:57 -0500 |
| commit | ebac6546df7e8bd17f66f029c616ea9ee3c595ae (patch) | |
| tree | 98801f44053407dc2990b16fbcfdbc5cb770416c /arch/arm/mach-realview/include | |
| parent | 4c3ea3717103ffcccfaebedb98c2dadfb54e0482 (diff) | |
RealView: Use only the shadow mapping of ARM11MPCore local timers
All the cases where the local timer for a CPU is accessed happen on the
corresponding current CPU, hence no need to access the per-CPU local
timer mappings.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/mach-realview/include')
| -rw-r--r-- | arch/arm/mach-realview/include/mach/board-eb.h | 6 | ||||
| -rw-r--r-- | arch/arm/mach-realview/include/mach/board-pb11mp.h | 3 |
2 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h index e1a6df29eaf6..cdbf551fd3de 100644 --- a/arch/arm/mach-realview/include/mach/board-eb.h +++ b/arch/arm/mach-realview/include/mach/board-eb.h | |||
| @@ -49,16 +49,14 @@ | |||
| 49 | #ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB | 49 | #ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB |
| 50 | #define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */ | 50 | #define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */ |
| 51 | #define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ | 51 | #define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ |
| 52 | #define REALVIEW_EB11MP_TWD_BASE 0x10100700 | 52 | #define REALVIEW_EB11MP_TWD_BASE 0x10100600 |
| 53 | #define REALVIEW_EB11MP_TWD_SIZE 0x00000100 | ||
| 54 | #define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ | 53 | #define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ |
| 55 | #define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */ | 54 | #define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */ |
| 56 | #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */ | 55 | #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */ |
| 57 | #else | 56 | #else |
| 58 | #define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */ | 57 | #define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */ |
| 59 | #define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */ | 58 | #define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */ |
| 60 | #define REALVIEW_EB11MP_TWD_BASE 0x1F000700 | 59 | #define REALVIEW_EB11MP_TWD_BASE 0x1F000600 |
| 61 | #define REALVIEW_EB11MP_TWD_SIZE 0x00000100 | ||
| 62 | #define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */ | 60 | #define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */ |
| 63 | #define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */ | 61 | #define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */ |
| 64 | #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ | 62 | #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ |
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h index ecd80e58631e..53ea0e7a1267 100644 --- a/arch/arm/mach-realview/include/mach/board-pb11mp.h +++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h | |||
| @@ -77,8 +77,7 @@ | |||
| 77 | */ | 77 | */ |
| 78 | #define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */ | 78 | #define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */ |
| 79 | #define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */ | 79 | #define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */ |
| 80 | #define REALVIEW_TC11MP_TWD_BASE 0x1F000700 | 80 | #define REALVIEW_TC11MP_TWD_BASE 0x1F000600 |
| 81 | #define REALVIEW_TC11MP_TWD_SIZE 0x00000100 | ||
| 82 | #define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ | 81 | #define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ |
| 83 | #define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ | 82 | #define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ |
| 84 | 83 | ||