diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-26 14:59:44 -0500 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-26 14:59:44 -0500 |
| commit | dcf81c1af839b77b44404453ecae6e5ac5a75f05 (patch) | |
| tree | 289dcbda5fbca34e7e0cf028908b9b517fa8b8b2 /arch/arm/mach-realview/include | |
| parent | 34e5f4f198ddd36a82dc12164de7fc4f5430e09d (diff) | |
| parent | 75c06963dd947252271ffa6107a25cddb2b8f362 (diff) | |
Merge branch 'amba' into for-armsoc
Diffstat (limited to 'arch/arm/mach-realview/include')
| -rw-r--r-- | arch/arm/mach-realview/include/mach/irqs-pb1176.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h index 5c3c625e3e04..708f84156f2c 100644 --- a/arch/arm/mach-realview/include/mach/irqs-pb1176.h +++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h | |||
| @@ -40,6 +40,7 @@ | |||
| 40 | #define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) | 40 | #define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) |
| 41 | #define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) | 41 | #define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) |
| 42 | #define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ | 42 | #define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ |
| 43 | #define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16) | ||
| 43 | #define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ | 44 | #define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ |
| 44 | #define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ | 45 | #define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ |
| 45 | #define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ | 46 | #define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ |
| @@ -73,7 +74,6 @@ | |||
| 73 | #define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ | 74 | #define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ |
| 74 | #define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ | 75 | #define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ |
| 75 | 76 | ||
| 76 | #define IRQ_PB1176_GPIO0 -1 | ||
| 77 | #define IRQ_PB1176_SCTL -1 | 77 | #define IRQ_PB1176_SCTL -1 |
| 78 | 78 | ||
| 79 | #define NR_GIC_PB1176 2 | 79 | #define NR_GIC_PB1176 2 |