aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-realview/include/mach
diff options
context:
space:
mode:
authorOlof Johansson <olof@lixom.net>2012-02-07 18:04:15 -0500
committerOlof Johansson <olof@lixom.net>2012-02-07 18:05:20 -0500
commita5f17d1f4c2831b9b9bf8b1a537cdbac995d6e13 (patch)
treecce7eab28de00a88d75b8eda704f5838e10947b1 /arch/arm/mach-realview/include/mach
parentdcf81c1af839b77b44404453ecae6e5ac5a75f05 (diff)
parent62aa2b537c6f5957afd98e29f96897419ed5ebab (diff)
Merge tag 'v3.3-rc2' into depends/rmk/for-armsoc
There were conflicts between fixes going in after 3.3-rc1 and Russell's stable arm-soc base branch. Resolving it in the dependency branch so that each topic branch shares the same resolution. Conflicts: arch/arm/mach-at91/at91cap9.c arch/arm/mach-at91/at91sam9g45.c
Diffstat (limited to 'arch/arm/mach-realview/include/mach')
-rw-r--r--arch/arm/mach-realview/include/mach/board-eb.h18
-rw-r--r--arch/arm/mach-realview/include/mach/board-pb11mp.h2
2 files changed, 12 insertions, 8 deletions
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index 794a8d91a6a6..124bce6b4d7b 100644
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -47,21 +47,23 @@
47#define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */ 47#define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */
48 48
49#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB 49#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
50#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */ 50#define REALVIEW_EB11MP_PRIV_MEM_BASE 0x1F000000
51#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
52#define REALVIEW_EB11MP_TWD_BASE 0x10100600
53#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
54#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */ 51#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
55#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */ 52#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
56#else 53#else
57#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */ 54#define REALVIEW_EB11MP_PRIV_MEM_BASE 0x1F000000
58#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
59#define REALVIEW_EB11MP_TWD_BASE 0x1F000600
60#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
61#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */ 55#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
62#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ 56#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
63#endif 57#endif
64 58
59#define REALVIEW_EB11MP_PRIV_MEM_SIZE SZ_8K
60#define REALVIEW_EB11MP_PRIV_MEM_OFF(x) (REALVIEW_EB11MP_PRIV_MEM_BASE + (x))
61
62#define REALVIEW_EB11MP_SCU_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0) /* SCU registers */
63#define REALVIEW_EB11MP_GIC_CPU_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x0100) /* Generic interrupt controller CPU interface */
64#define REALVIEW_EB11MP_TWD_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x0600)
65#define REALVIEW_EB11MP_GIC_DIST_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x1000) /* Generic interrupt controller distributor */
66
65/* 67/*
66 * Core tile identification (REALVIEW_SYS_PROCID) 68 * Core tile identification (REALVIEW_SYS_PROCID)
67 */ 69 */
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h
index 7abf918b77e9..aa2d4e02ea2c 100644
--- a/arch/arm/mach-realview/include/mach/board-pb11mp.h
+++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h
@@ -75,6 +75,8 @@
75/* 75/*
76 * Testchip peripheral and fpga gic regions 76 * Testchip peripheral and fpga gic regions
77 */ 77 */
78#define REALVIEW_TC11MP_PRIV_MEM_BASE 0x1F000000
79#define REALVIEW_TC11MP_PRIV_MEM_SIZE SZ_8K
78#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */ 80#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */
79#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */ 81#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */
80#define REALVIEW_TC11MP_TWD_BASE 0x1F000600 82#define REALVIEW_TC11MP_TWD_BASE 0x1F000600