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authorDaniel Mack <daniel@caiaq.de>2009-03-05 08:21:26 -0500
committerMark Brown <broonie@opensource.wolfsonmicro.com>2009-03-06 08:37:13 -0500
commitb0c5033f02182d1e9634edc737df88b82264e820 (patch)
tree0447a2c33bcdb365961709c0b508a4463e52738b /arch/arm/mach-pxa
parent42aa3418ebd7b79be0e1ee7515e365c1574114f9 (diff)
ASoC: add two more bitfields for PXA SSP
Add two more bitfields for the PSP register. As they seem to exist for PXA3xx only, define them conditionally. Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r--arch/arm/mach-pxa/include/mach/regs-ssp.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/include/mach/regs-ssp.h b/arch/arm/mach-pxa/include/mach/regs-ssp.h
index cacdcae451e6..f43905a27737 100644
--- a/arch/arm/mach-pxa/include/mach/regs-ssp.h
+++ b/arch/arm/mach-pxa/include/mach/regs-ssp.h
@@ -106,6 +106,11 @@
106#define SSSR_TINT (1 << 19) /* Receiver Time-out Interrupt */ 106#define SSSR_TINT (1 << 19) /* Receiver Time-out Interrupt */
107#define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */ 107#define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */
108 108
109#if defined(CONFIG_PXA3xx)
110#define SSPSP_EDMYSTOP(x) ((x) << 28) /* Extended Dummy Stop */
111#define SSPSP_EDMYSTRT(x) ((x) << 26) /* Extended Dummy Start */
112#endif
113
109#define SSPSP_FSRT (1 << 25) /* Frame Sync Relative Timing */ 114#define SSPSP_FSRT (1 << 25) /* Frame Sync Relative Timing */
110#define SSPSP_DMYSTOP(x) ((x) << 23) /* Dummy Stop */ 115#define SSPSP_DMYSTOP(x) ((x) << 23) /* Dummy Stop */
111#define SSPSP_SFRMWDTH(x) ((x) << 16) /* Serial Frame Width */ 116#define SSPSP_SFRMWDTH(x) ((x) << 16) /* Serial Frame Width */