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authorPhilipp Zabel <philipp.zabel@gmail.com>2009-04-17 05:47:57 -0400
committerEric Miao <eric.y.miao@gmail.com>2009-06-04 22:32:20 -0400
commita01bd58449088b63da45ab5f2c7921893eb7d143 (patch)
tree4d8797d90d4a2b25c111d9677d0665f6bfe47db6 /arch/arm/mach-pxa
parent46580c03062da8c047238a6b3d2b2b13af1700b5 (diff)
[ARM] pxa: allow IRQ_BOARD_END to be customized and make zylonite to use it
The default value is 16 IRQs. Zylonite needs 32, ASIC3 based boards need 70. My problem is still that due to the way IRQ_GPIO is hardcoded, ASIC3 based boards need 70 IRQs starting at IRQ_BOARD_START. If I define ASIC3 IRQs similar to LoCoMo or SA1111, things break as soon as something selects PXA_HAVE_BOARD_IRQS. Increasing the default number of board IRQs to 70 instead doesn't seem very nice. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r--arch/arm/mach-pxa/Kconfig1
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h16
2 files changed, 12 insertions, 5 deletions
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 47747f96f125..3b34f34db204 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -280,6 +280,7 @@ config MACH_ZYLONITE
280 select PXA3xx 280 select PXA3xx
281 select PXA_SSP 281 select PXA_SSP
282 select HAVE_PWM 282 select HAVE_PWM
283 select PXA_HAVE_BOARD_IRQS
283 284
284config MACH_LITTLETON 285config MACH_LITTLETON
285 bool "PXA3xx Form Factor Platform (aka Littleton)" 286 bool "PXA3xx Form Factor Platform (aka Littleton)"
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 32bb4a2eb7f1..ebf38bbb347f 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -91,13 +91,21 @@
91#define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i)) 91#define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i))
92 92
93/* 93/*
94 * The next 16 interrupts are for board specific purposes. Since 94 * The following interrupts are for board specific purposes. Since
95 * the kernel can only run on one machine at a time, we can re-use 95 * the kernel can only run on one machine at a time, we can re-use
96 * these. If you need more, increase IRQ_BOARD_END, but keep it 96 * these. There will be 16 IRQs by default. If it is not enough,
97 * within sensible limits. 97 * IRQ_BOARD_END is allowed be customized for each board, but keep
98 * the numbers within sensible limits and in descending order, so
99 * when multiple config options are selected, the maximum will be
100 * used.
98 */ 101 */
99#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) 102#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM)
103
104#if defined(CONFIG_MACH_ZYLONITE)
105#define IRQ_BOARD_END (IRQ_BOARD_START + 32)
106#else
100#define IRQ_BOARD_END (IRQ_BOARD_START + 16) 107#define IRQ_BOARD_END (IRQ_BOARD_START + 16)
108#endif
101 109
102#define IRQ_SA1111_START (IRQ_BOARD_END) 110#define IRQ_SA1111_START (IRQ_BOARD_END)
103#define IRQ_GPAIN0 (IRQ_BOARD_END + 0) 111#define IRQ_GPAIN0 (IRQ_BOARD_END + 0)
@@ -188,8 +196,6 @@
188#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) 196#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1)
189#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS) 197#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
190#define NR_IRQS (IRQ_BOARD_END) 198#define NR_IRQS (IRQ_BOARD_END)
191#elif defined(CONFIG_MACH_ZYLONITE)
192#define NR_IRQS (IRQ_BOARD_START + 32)
193#else 199#else
194#define NR_IRQS (IRQ_BOARD_START) 200#define NR_IRQS (IRQ_BOARD_START)
195#endif 201#endif