diff options
author | Eric Miao <eric.y.miao@gmail.com> | 2010-11-29 09:56:00 -0500 |
---|---|---|
committer | Eric Miao <eric.y.miao@gmail.com> | 2010-12-20 10:07:43 -0500 |
commit | c085052bc52d7caaca1172aabbedc06777253961 (patch) | |
tree | 0bcc0eb62f7c890fabfc3b0ab1cfab6a68cef69b /arch/arm/mach-pxa | |
parent | a3172e5413a06af772c6ad34c0f68a2ebbdbcf86 (diff) |
ARM: pxa: add clock for static memory controller
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r-- | arch/arm/mach-pxa/clock-pxa3xx.c | 25 | ||||
-rw-r--r-- | arch/arm/mach-pxa/clock.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/pxa3xx.c | 2 |
3 files changed, 25 insertions, 3 deletions
diff --git a/arch/arm/mach-pxa/clock-pxa3xx.c b/arch/arm/mach-pxa/clock-pxa3xx.c index 25be4adf6f42..1b08a34ab234 100644 --- a/arch/arm/mach-pxa/clock-pxa3xx.c +++ b/arch/arm/mach-pxa/clock-pxa3xx.c | |||
@@ -9,7 +9,9 @@ | |||
9 | #include <linux/module.h> | 9 | #include <linux/module.h> |
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <linux/io.h> | ||
12 | 13 | ||
14 | #include <mach/smemc.h> | ||
13 | #include <mach/pxa3xx-regs.h> | 15 | #include <mach/pxa3xx-regs.h> |
14 | 16 | ||
15 | #include "clock.h" | 17 | #include "clock.h" |
@@ -23,9 +25,6 @@ | |||
23 | #define ACCR_D0CS (1 << 26) | 25 | #define ACCR_D0CS (1 << 26) |
24 | #define ACCR_PCCE (1 << 11) | 26 | #define ACCR_PCCE (1 << 11) |
25 | 27 | ||
26 | /* crystal frequency to static memory controller multiplier (SMCFS) */ | ||
27 | static unsigned char smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, }; | ||
28 | |||
29 | /* crystal frequency to HSIO bus frequency multiplier (HSS) */ | 28 | /* crystal frequency to HSIO bus frequency multiplier (HSS) */ |
30 | static unsigned char hss_mult[4] = { 8, 12, 16, 24 }; | 29 | static unsigned char hss_mult[4] = { 8, 12, 16, 24 }; |
31 | 30 | ||
@@ -108,6 +107,20 @@ static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk) | |||
108 | return hsio_clk; | 107 | return hsio_clk; |
109 | } | 108 | } |
110 | 109 | ||
110 | /* crystal frequency to static memory controller multiplier (SMCFS) */ | ||
111 | static unsigned int smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, }; | ||
112 | static unsigned int df_clkdiv[4] = { 1, 2, 4, 1 }; | ||
113 | |||
114 | static unsigned long clk_pxa3xx_smemc_getrate(struct clk *clk) | ||
115 | { | ||
116 | unsigned long acsr = ACSR; | ||
117 | unsigned long memclkcfg = __raw_readl(MEMCLKCFG); | ||
118 | unsigned int smcfs = (acsr >> 23) & 0x7; | ||
119 | |||
120 | return BASE_CLK * smcfs_mult[(acsr >> 23) & 0x7] / | ||
121 | df_clkdiv[(memclkcfg >> 16) & 0x3]; | ||
122 | } | ||
123 | |||
111 | void clk_pxa3xx_cken_enable(struct clk *clk) | 124 | void clk_pxa3xx_cken_enable(struct clk *clk) |
112 | { | 125 | { |
113 | unsigned long mask = 1ul << (clk->cken & 0x1f); | 126 | unsigned long mask = 1ul << (clk->cken & 0x1f); |
@@ -145,6 +158,12 @@ const struct clkops clk_pxa3xx_ac97_ops = { | |||
145 | .getrate = clk_pxa3xx_ac97_getrate, | 158 | .getrate = clk_pxa3xx_ac97_getrate, |
146 | }; | 159 | }; |
147 | 160 | ||
161 | const struct clkops clk_pxa3xx_smemc_ops = { | ||
162 | .enable = clk_pxa3xx_cken_enable, | ||
163 | .disable = clk_pxa3xx_cken_disable, | ||
164 | .getrate = clk_pxa3xx_smemc_getrate, | ||
165 | }; | ||
166 | |||
148 | static void clk_pout_enable(struct clk *clk) | 167 | static void clk_pout_enable(struct clk *clk) |
149 | { | 168 | { |
150 | OSCC |= OSCC_PEN; | 169 | OSCC |= OSCC_PEN; |
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h index 3a607521dc21..6e949944f2ec 100644 --- a/arch/arm/mach-pxa/clock.h +++ b/arch/arm/mach-pxa/clock.h | |||
@@ -69,6 +69,7 @@ extern const struct clkops clk_pxa3xx_cken_ops; | |||
69 | extern const struct clkops clk_pxa3xx_hsio_ops; | 69 | extern const struct clkops clk_pxa3xx_hsio_ops; |
70 | extern const struct clkops clk_pxa3xx_ac97_ops; | 70 | extern const struct clkops clk_pxa3xx_ac97_ops; |
71 | extern const struct clkops clk_pxa3xx_pout_ops; | 71 | extern const struct clkops clk_pxa3xx_pout_ops; |
72 | extern const struct clkops clk_pxa3xx_smemc_ops; | ||
72 | 73 | ||
73 | extern void clk_pxa3xx_cken_enable(struct clk *); | 74 | extern void clk_pxa3xx_cken_enable(struct clk *); |
74 | extern void clk_pxa3xx_cken_disable(struct clk *); | 75 | extern void clk_pxa3xx_cken_disable(struct clk *); |
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index da3edcc9ac77..e14818f5d950 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
@@ -59,6 +59,7 @@ static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0); | |||
59 | static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0); | 59 | static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0); |
60 | 60 | ||
61 | static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops); | 61 | static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops); |
62 | static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops); | ||
62 | static DEFINE_CK(pxa3xx_camera, CAMERA, &clk_pxa3xx_hsio_ops); | 63 | static DEFINE_CK(pxa3xx_camera, CAMERA, &clk_pxa3xx_hsio_ops); |
63 | static DEFINE_CK(pxa3xx_ac97, AC97, &clk_pxa3xx_ac97_ops); | 64 | static DEFINE_CK(pxa3xx_ac97, AC97, &clk_pxa3xx_ac97_ops); |
64 | static DEFINE_CLK(pxa3xx_pout, &clk_pxa3xx_pout_ops, 13000000, 70); | 65 | static DEFINE_CLK(pxa3xx_pout, &clk_pxa3xx_pout_ops, 13000000, 70); |
@@ -87,6 +88,7 @@ static struct clk_lookup pxa3xx_clkregs[] = { | |||
87 | INIT_CLKREG(&clk_pxa3xx_pwm1, "pxa27x-pwm.1", NULL), | 88 | INIT_CLKREG(&clk_pxa3xx_pwm1, "pxa27x-pwm.1", NULL), |
88 | INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL), | 89 | INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL), |
89 | INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL), | 90 | INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL), |
91 | INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL), | ||
90 | }; | 92 | }; |
91 | 93 | ||
92 | #ifdef CONFIG_PM | 94 | #ifdef CONFIG_PM |