[ARM] 3500/1: fix PXA27x DMA allocation priority

Patch from Nicolas Pitre

Intel PXA27x developers manual section 5.4.1.1 lists a priority
distribution for the DMA channels differently than what the code
currently assumes.  This patch fixes that.

Noticed by Simon Vogl <vogl@soft.uni-linz.ac.at>

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 5 insertions, 12 deletions

diff --git a/arch/arm/mach-pxa/dma.c b/arch/arm/mach-pxa/dma.c
index 458112b21e25..7d8c85486c66 100644
--- a/arch/arm/mach-pxa/dma.c
+++ b/arch/arm/mach-pxa/dma.c
@@ -45,23 +45,16 @@ int pxa_request_dma (char *name, pxa_dma_prio prio,
 
         local_irq_save(flags);
 
-        /* try grabbing a DMA channel with the requested priority */
-        for (i = prio; i < prio + PXA_DMA_NBCH(prio); i++) {
-                if (!dma_channels[i].name) {
-                        found = 1;
-                        break;
-                }
-        }
-
-        if (!found) {
-                /* requested prio group is full, try hier priorities */
-                for (i = prio-1; i >= 0; i--) {
+        do {
+                /* try grabbing a DMA channel with the requested priority */
+                pxa_for_each_dma_prio (i, prio) {
                         if (!dma_channels[i].name) {
                                 found = 1;
                                 break;
                         }
                 }
-        }
+                /* if requested prio group is full, try a hier priority */
+        } while (!found && prio--);
 
         if (found) {
                 DCSR(i) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;