diff options
author | Eric Miao <eric.miao@marvell.com> | 2009-01-15 03:42:56 -0500 |
---|---|---|
committer | Eric Miao <eric.miao@marvell.com> | 2009-03-22 22:11:34 -0400 |
commit | f8dec04d33b94a4cfa9358fd9666c01480bb164d (patch) | |
tree | bcf82252230a757f26d6de980749b9e4395cd8b9 /arch/arm/mach-pxa | |
parent | 38f539a608c9a3b40b30f1892bd5f9a38f4e5ffe (diff) |
[ARM] pxa: move common MFP handling code into plat-pxa
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r-- | arch/arm/mach-pxa/include/mach/mfp-pxa25x.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/mfp-pxa27x.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/mfp-pxa300.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/mfp-pxa320.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/mfp-pxa3xx.h | 130 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/mfp-pxa930.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/mfp-pxa3xx.c | 189 | ||||
-rw-r--r-- | arch/arm/mach-pxa/pxa300.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-pxa/pxa320.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-pxa/pxa930.c | 6 |
11 files changed, 32 insertions, 316 deletions
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h index a72869b73ee3..b13dc0269a6d 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h | |||
@@ -1,7 +1,6 @@ | |||
1 | #ifndef __ASM_ARCH_MFP_PXA25X_H | 1 | #ifndef __ASM_ARCH_MFP_PXA25X_H |
2 | #define __ASM_ARCH_MFP_PXA25X_H | 2 | #define __ASM_ARCH_MFP_PXA25X_H |
3 | 3 | ||
4 | #include <mach/mfp.h> | ||
5 | #include <mach/mfp-pxa2xx.h> | 4 | #include <mach/mfp-pxa2xx.h> |
6 | 5 | ||
7 | /* GPIO */ | 6 | /* GPIO */ |
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h index da4f85a4f990..6543c05f47ed 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h | |||
@@ -8,7 +8,6 @@ | |||
8 | * specific controller, and this should work in most cases. | 8 | * specific controller, and this should work in most cases. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <mach/mfp.h> | ||
12 | #include <mach/mfp-pxa2xx.h> | 11 | #include <mach/mfp-pxa2xx.h> |
13 | 12 | ||
14 | /* Note: GPIO3/GPIO4 will be driven by Power I2C when PCFR/PI2C_EN | 13 | /* Note: GPIO3/GPIO4 will be driven by Power I2C when PCFR/PI2C_EN |
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h index 3e9211591e20..658b28ed129b 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h | |||
@@ -1,7 +1,7 @@ | |||
1 | #ifndef __ASM_ARCH_MFP_PXA2XX_H | 1 | #ifndef __ASM_ARCH_MFP_PXA2XX_H |
2 | #define __ASM_ARCH_MFP_PXA2XX_H | 2 | #define __ASM_ARCH_MFP_PXA2XX_H |
3 | 3 | ||
4 | #include <mach/mfp.h> | 4 | #include <plat/mfp.h> |
5 | 5 | ||
6 | /* | 6 | /* |
7 | * the following MFP_xxx bit definitions in mfp.h are re-used for pxa2xx: | 7 | * the following MFP_xxx bit definitions in mfp.h are re-used for pxa2xx: |
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa300.h b/arch/arm/mach-pxa/include/mach/mfp-pxa300.h index 928fbef9cbf3..ae8441192ef0 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa300.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa300.h | |||
@@ -15,7 +15,6 @@ | |||
15 | #ifndef __ASM_ARCH_MFP_PXA300_H | 15 | #ifndef __ASM_ARCH_MFP_PXA300_H |
16 | #define __ASM_ARCH_MFP_PXA300_H | 16 | #define __ASM_ARCH_MFP_PXA300_H |
17 | 17 | ||
18 | #include <mach/mfp.h> | ||
19 | #include <mach/mfp-pxa3xx.h> | 18 | #include <mach/mfp-pxa3xx.h> |
20 | 19 | ||
21 | /* GPIO */ | 20 | /* GPIO */ |
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h index 80a0da9e092d..07897e61d05a 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h | |||
@@ -15,7 +15,6 @@ | |||
15 | #ifndef __ASM_ARCH_MFP_PXA320_H | 15 | #ifndef __ASM_ARCH_MFP_PXA320_H |
16 | #define __ASM_ARCH_MFP_PXA320_H | 16 | #define __ASM_ARCH_MFP_PXA320_H |
17 | 17 | ||
18 | #include <mach/mfp.h> | ||
19 | #include <mach/mfp-pxa3xx.h> | 18 | #include <mach/mfp-pxa3xx.h> |
20 | 19 | ||
21 | /* GPIO */ | 20 | /* GPIO */ |
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa3xx.h b/arch/arm/mach-pxa/include/mach/mfp-pxa3xx.h index 1f6b35c015d0..d375195d982b 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa3xx.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa3xx.h | |||
@@ -1,68 +1,9 @@ | |||
1 | #ifndef __ASM_ARCH_MFP_PXA3XX_H | 1 | #ifndef __ASM_ARCH_MFP_PXA3XX_H |
2 | #define __ASM_ARCH_MFP_PXA3XX_H | 2 | #define __ASM_ARCH_MFP_PXA3XX_H |
3 | 3 | ||
4 | #define MFPR_BASE (0x40e10000) | 4 | #include <plat/mfp.h> |
5 | #define MFPR_SIZE (PAGE_SIZE) | ||
6 | |||
7 | /* MFPR register bit definitions */ | ||
8 | #define MFPR_PULL_SEL (0x1 << 15) | ||
9 | #define MFPR_PULLUP_EN (0x1 << 14) | ||
10 | #define MFPR_PULLDOWN_EN (0x1 << 13) | ||
11 | #define MFPR_SLEEP_SEL (0x1 << 9) | ||
12 | #define MFPR_SLEEP_OE_N (0x1 << 7) | ||
13 | #define MFPR_EDGE_CLEAR (0x1 << 6) | ||
14 | #define MFPR_EDGE_FALL_EN (0x1 << 5) | ||
15 | #define MFPR_EDGE_RISE_EN (0x1 << 4) | ||
16 | |||
17 | #define MFPR_SLEEP_DATA(x) ((x) << 8) | ||
18 | #define MFPR_DRIVE(x) (((x) & 0x7) << 10) | ||
19 | #define MFPR_AF_SEL(x) (((x) & 0x7) << 0) | ||
20 | 5 | ||
21 | #define MFPR_EDGE_NONE (0) | 6 | #define MFPR_BASE (0x40e10000) |
22 | #define MFPR_EDGE_RISE (MFPR_EDGE_RISE_EN) | ||
23 | #define MFPR_EDGE_FALL (MFPR_EDGE_FALL_EN) | ||
24 | #define MFPR_EDGE_BOTH (MFPR_EDGE_RISE | MFPR_EDGE_FALL) | ||
25 | |||
26 | /* | ||
27 | * Table that determines the low power modes outputs, with actual settings | ||
28 | * used in parentheses for don't-care values. Except for the float output, | ||
29 | * the configured driven and pulled levels match, so if there is a need for | ||
30 | * non-LPM pulled output, the same configuration could probably be used. | ||
31 | * | ||
32 | * Output value sleep_oe_n sleep_data pullup_en pulldown_en pull_sel | ||
33 | * (bit 7) (bit 8) (bit 14) (bit 13) (bit 15) | ||
34 | * | ||
35 | * Input 0 X(0) X(0) X(0) 0 | ||
36 | * Drive 0 0 0 0 X(1) 0 | ||
37 | * Drive 1 0 1 X(1) 0 0 | ||
38 | * Pull hi (1) 1 X(1) 1 0 0 | ||
39 | * Pull lo (0) 1 X(0) 0 1 0 | ||
40 | * Z (float) 1 X(0) 0 0 0 | ||
41 | */ | ||
42 | #define MFPR_LPM_INPUT (0) | ||
43 | #define MFPR_LPM_DRIVE_LOW (MFPR_SLEEP_DATA(0) | MFPR_PULLDOWN_EN) | ||
44 | #define MFPR_LPM_DRIVE_HIGH (MFPR_SLEEP_DATA(1) | MFPR_PULLUP_EN) | ||
45 | #define MFPR_LPM_PULL_LOW (MFPR_LPM_DRIVE_LOW | MFPR_SLEEP_OE_N) | ||
46 | #define MFPR_LPM_PULL_HIGH (MFPR_LPM_DRIVE_HIGH | MFPR_SLEEP_OE_N) | ||
47 | #define MFPR_LPM_FLOAT (MFPR_SLEEP_OE_N) | ||
48 | #define MFPR_LPM_MASK (0xe080) | ||
49 | |||
50 | /* | ||
51 | * The pullup and pulldown state of the MFP pin at run mode is by default | ||
52 | * determined by the selected alternate function. In case that some buggy | ||
53 | * devices need to override this default behavior, the definitions below | ||
54 | * indicates the setting of corresponding MFPR bits | ||
55 | * | ||
56 | * Definition pull_sel pullup_en pulldown_en | ||
57 | * MFPR_PULL_NONE 0 0 0 | ||
58 | * MFPR_PULL_LOW 1 0 1 | ||
59 | * MFPR_PULL_HIGH 1 1 0 | ||
60 | * MFPR_PULL_BOTH 1 1 1 | ||
61 | */ | ||
62 | #define MFPR_PULL_NONE (0) | ||
63 | #define MFPR_PULL_LOW (MFPR_PULL_SEL | MFPR_PULLDOWN_EN) | ||
64 | #define MFPR_PULL_BOTH (MFPR_PULL_LOW | MFPR_PULLUP_EN) | ||
65 | #define MFPR_PULL_HIGH (MFPR_PULL_SEL | MFPR_PULLUP_EN) | ||
66 | 7 | ||
67 | /* PXA3xx common MFP configurations - processor specific ones defined | 8 | /* PXA3xx common MFP configurations - processor specific ones defined |
68 | * in mfp-pxa300.h and mfp-pxa320.h | 9 | * in mfp-pxa300.h and mfp-pxa320.h |
@@ -197,56 +138,21 @@ | |||
197 | #define GPIO5_2_GPIO MFP_CFG(GPIO5_2, AF0) | 138 | #define GPIO5_2_GPIO MFP_CFG(GPIO5_2, AF0) |
198 | #define GPIO6_2_GPIO MFP_CFG(GPIO6_2, AF0) | 139 | #define GPIO6_2_GPIO MFP_CFG(GPIO6_2, AF0) |
199 | 140 | ||
200 | /* | 141 | /* NOTE: usage of these two functions is not recommended, |
201 | * each MFP pin will have a MFPR register, since the offset of the | 142 | * use pxa3xx_mfp_config() instead. |
202 | * register varies between processors, the processor specific code | ||
203 | * should initialize the pin offsets by pxa3xx_mfp_init_addr() | ||
204 | * | ||
205 | * pxa3xx_mfp_init_addr - accepts a table of "pxa3xx_mfp_addr_map" | ||
206 | * structure, which represents a range of MFP pins from "start" to | ||
207 | * "end", with the offset begining at "offset", to define a single | ||
208 | * pin, let "end" = -1 | ||
209 | * | ||
210 | * use | ||
211 | * | ||
212 | * MFP_ADDR_X() to define a range of pins | ||
213 | * MFP_ADDR() to define a single pin | ||
214 | * MFP_ADDR_END to signal the end of pin offset definitions | ||
215 | */ | ||
216 | struct pxa3xx_mfp_addr_map { | ||
217 | unsigned int start; | ||
218 | unsigned int end; | ||
219 | unsigned long offset; | ||
220 | }; | ||
221 | |||
222 | #define MFP_ADDR_X(start, end, offset) \ | ||
223 | { MFP_PIN_##start, MFP_PIN_##end, offset } | ||
224 | |||
225 | #define MFP_ADDR(pin, offset) \ | ||
226 | { MFP_PIN_##pin, -1, offset } | ||
227 | |||
228 | #define MFP_ADDR_END { MFP_PIN_INVALID, 0 } | ||
229 | |||
230 | /* | ||
231 | * pxa3xx_mfp_read()/pxa3xx_mfp_write() - for direct read/write access | ||
232 | * to the MFPR register | ||
233 | */ | ||
234 | unsigned long pxa3xx_mfp_read(int mfp); | ||
235 | void pxa3xx_mfp_write(int mfp, unsigned long mfpr_val); | ||
236 | |||
237 | /* | ||
238 | * pxa3xx_mfp_config - configure the MFPR registers | ||
239 | * | ||
240 | * used by board specific initialization code | ||
241 | */ | ||
242 | void pxa3xx_mfp_config(unsigned long *mfp_cfgs, int num); | ||
243 | |||
244 | /* | ||
245 | * pxa3xx_mfp_init_addr() - initialize the mapping between mfp pin | ||
246 | * index and MFPR register offset | ||
247 | * | ||
248 | * used by processor specific code | ||
249 | */ | 143 | */ |
250 | void __init pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map *); | 144 | static inline unsigned long pxa3xx_mfp_read(int mfp) |
251 | void __init pxa3xx_init_mfp(void); | 145 | { |
146 | return mfp_read(mfp); | ||
147 | } | ||
148 | |||
149 | static inline void pxa3xx_mfp_write(int mfp, unsigned long val) | ||
150 | { | ||
151 | mfp_write(mfp, val); | ||
152 | } | ||
153 | |||
154 | static inline void pxa3xx_mfp_config(unsigned long *mfp_cfg, int num) | ||
155 | { | ||
156 | mfp_config(mfp_cfg, num); | ||
157 | } | ||
252 | #endif /* __ASM_ARCH_MFP_PXA3XX_H */ | 158 | #endif /* __ASM_ARCH_MFP_PXA3XX_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa930.h b/arch/arm/mach-pxa/include/mach/mfp-pxa930.h index fa73f56a1372..0d119d3b9221 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa930.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa930.h | |||
@@ -13,7 +13,6 @@ | |||
13 | #ifndef __ASM_ARCH_MFP_PXA9xx_H | 13 | #ifndef __ASM_ARCH_MFP_PXA9xx_H |
14 | #define __ASM_ARCH_MFP_PXA9xx_H | 14 | #define __ASM_ARCH_MFP_PXA9xx_H |
15 | 15 | ||
16 | #include <mach/mfp.h> | ||
17 | #include <mach/mfp-pxa3xx.h> | 16 | #include <mach/mfp-pxa3xx.h> |
18 | 17 | ||
19 | /* GPIO */ | 18 | /* GPIO */ |
diff --git a/arch/arm/mach-pxa/mfp-pxa3xx.c b/arch/arm/mach-pxa/mfp-pxa3xx.c index eb197a6e8e94..7a270eecd480 100644 --- a/arch/arm/mach-pxa/mfp-pxa3xx.c +++ b/arch/arm/mach-pxa/mfp-pxa3xx.c | |||
@@ -20,183 +20,9 @@ | |||
20 | #include <linux/sysdev.h> | 20 | #include <linux/sysdev.h> |
21 | 21 | ||
22 | #include <mach/hardware.h> | 22 | #include <mach/hardware.h> |
23 | #include <mach/mfp.h> | ||
24 | #include <mach/mfp-pxa3xx.h> | 23 | #include <mach/mfp-pxa3xx.h> |
25 | #include <mach/pxa3xx-regs.h> | 24 | #include <mach/pxa3xx-regs.h> |
26 | 25 | ||
27 | /* mfp_spin_lock is used to ensure that MFP register configuration | ||
28 | * (most likely a read-modify-write operation) is atomic, and that | ||
29 | * mfp_table[] is consistent | ||
30 | */ | ||
31 | static DEFINE_SPINLOCK(mfp_spin_lock); | ||
32 | |||
33 | static void __iomem *mfpr_mmio_base = (void __iomem *)&__REG(MFPR_BASE); | ||
34 | |||
35 | struct pxa3xx_mfp_pin { | ||
36 | unsigned long config; /* -1 for not configured */ | ||
37 | unsigned long mfpr_off; /* MFPRxx Register offset */ | ||
38 | unsigned long mfpr_run; /* Run-Mode Register Value */ | ||
39 | unsigned long mfpr_lpm; /* Low Power Mode Register Value */ | ||
40 | }; | ||
41 | |||
42 | static struct pxa3xx_mfp_pin mfp_table[MFP_PIN_MAX]; | ||
43 | |||
44 | /* mapping of MFP_LPM_* definitions to MFPR_LPM_* register bits */ | ||
45 | static const unsigned long mfpr_lpm[] = { | ||
46 | MFPR_LPM_INPUT, | ||
47 | MFPR_LPM_DRIVE_LOW, | ||
48 | MFPR_LPM_DRIVE_HIGH, | ||
49 | MFPR_LPM_PULL_LOW, | ||
50 | MFPR_LPM_PULL_HIGH, | ||
51 | MFPR_LPM_FLOAT, | ||
52 | }; | ||
53 | |||
54 | /* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */ | ||
55 | static const unsigned long mfpr_pull[] = { | ||
56 | MFPR_PULL_NONE, | ||
57 | MFPR_PULL_LOW, | ||
58 | MFPR_PULL_HIGH, | ||
59 | MFPR_PULL_BOTH, | ||
60 | }; | ||
61 | |||
62 | /* mapping of MFP_LPM_EDGE_* definitions to MFPR_EDGE_* register bits */ | ||
63 | static const unsigned long mfpr_edge[] = { | ||
64 | MFPR_EDGE_NONE, | ||
65 | MFPR_EDGE_RISE, | ||
66 | MFPR_EDGE_FALL, | ||
67 | MFPR_EDGE_BOTH, | ||
68 | }; | ||
69 | |||
70 | #define mfpr_readl(off) \ | ||
71 | __raw_readl(mfpr_mmio_base + (off)) | ||
72 | |||
73 | #define mfpr_writel(off, val) \ | ||
74 | __raw_writel(val, mfpr_mmio_base + (off)) | ||
75 | |||
76 | #define mfp_configured(p) ((p)->config != -1) | ||
77 | |||
78 | /* | ||
79 | * perform a read-back of any MFPR register to make sure the | ||
80 | * previous writings are finished | ||
81 | */ | ||
82 | #define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0) | ||
83 | |||
84 | static inline void __mfp_config_run(struct pxa3xx_mfp_pin *p) | ||
85 | { | ||
86 | if (mfp_configured(p)) | ||
87 | mfpr_writel(p->mfpr_off, p->mfpr_run); | ||
88 | } | ||
89 | |||
90 | static inline void __mfp_config_lpm(struct pxa3xx_mfp_pin *p) | ||
91 | { | ||
92 | if (mfp_configured(p)) { | ||
93 | unsigned long mfpr_clr = (p->mfpr_run & ~MFPR_EDGE_BOTH) | MFPR_EDGE_CLEAR; | ||
94 | if (mfpr_clr != p->mfpr_run) | ||
95 | mfpr_writel(p->mfpr_off, mfpr_clr); | ||
96 | if (p->mfpr_lpm != mfpr_clr) | ||
97 | mfpr_writel(p->mfpr_off, p->mfpr_lpm); | ||
98 | } | ||
99 | } | ||
100 | |||
101 | void pxa3xx_mfp_config(unsigned long *mfp_cfgs, int num) | ||
102 | { | ||
103 | unsigned long flags; | ||
104 | int i; | ||
105 | |||
106 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
107 | |||
108 | for (i = 0; i < num; i++, mfp_cfgs++) { | ||
109 | unsigned long tmp, c = *mfp_cfgs; | ||
110 | struct pxa3xx_mfp_pin *p; | ||
111 | int pin, af, drv, lpm, edge, pull; | ||
112 | |||
113 | pin = MFP_PIN(c); | ||
114 | BUG_ON(pin >= MFP_PIN_MAX); | ||
115 | p = &mfp_table[pin]; | ||
116 | |||
117 | af = MFP_AF(c); | ||
118 | drv = MFP_DS(c); | ||
119 | lpm = MFP_LPM_STATE(c); | ||
120 | edge = MFP_LPM_EDGE(c); | ||
121 | pull = MFP_PULL(c); | ||
122 | |||
123 | /* run-mode pull settings will conflict with MFPR bits of | ||
124 | * low power mode state, calculate mfpr_run and mfpr_lpm | ||
125 | * individually if pull != MFP_PULL_NONE | ||
126 | */ | ||
127 | tmp = MFPR_AF_SEL(af) | MFPR_DRIVE(drv); | ||
128 | |||
129 | if (likely(pull == MFP_PULL_NONE)) { | ||
130 | p->mfpr_run = tmp | mfpr_lpm[lpm] | mfpr_edge[edge]; | ||
131 | p->mfpr_lpm = p->mfpr_run; | ||
132 | } else { | ||
133 | p->mfpr_lpm = tmp | mfpr_lpm[lpm] | mfpr_edge[edge]; | ||
134 | p->mfpr_run = tmp | mfpr_pull[pull]; | ||
135 | } | ||
136 | |||
137 | p->config = c; __mfp_config_run(p); | ||
138 | } | ||
139 | |||
140 | mfpr_sync(); | ||
141 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
142 | } | ||
143 | |||
144 | unsigned long pxa3xx_mfp_read(int mfp) | ||
145 | { | ||
146 | unsigned long val, flags; | ||
147 | |||
148 | BUG_ON(mfp >= MFP_PIN_MAX); | ||
149 | |||
150 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
151 | val = mfpr_readl(mfp_table[mfp].mfpr_off); | ||
152 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
153 | |||
154 | return val; | ||
155 | } | ||
156 | |||
157 | void pxa3xx_mfp_write(int mfp, unsigned long val) | ||
158 | { | ||
159 | unsigned long flags; | ||
160 | |||
161 | BUG_ON(mfp >= MFP_PIN_MAX); | ||
162 | |||
163 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
164 | mfpr_writel(mfp_table[mfp].mfpr_off, val); | ||
165 | mfpr_sync(); | ||
166 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
167 | } | ||
168 | |||
169 | void __init pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map *map) | ||
170 | { | ||
171 | struct pxa3xx_mfp_addr_map *p; | ||
172 | unsigned long offset, flags; | ||
173 | int i; | ||
174 | |||
175 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
176 | |||
177 | for (p = map; p->start != MFP_PIN_INVALID; p++) { | ||
178 | offset = p->offset; | ||
179 | i = p->start; | ||
180 | |||
181 | do { | ||
182 | mfp_table[i].mfpr_off = offset; | ||
183 | mfp_table[i].mfpr_run = 0; | ||
184 | mfp_table[i].mfpr_lpm = 0; | ||
185 | offset += 4; i++; | ||
186 | } while ((i <= p->end) && (p->end != -1)); | ||
187 | } | ||
188 | |||
189 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
190 | } | ||
191 | |||
192 | void __init pxa3xx_init_mfp(void) | ||
193 | { | ||
194 | int i; | ||
195 | |||
196 | for (i = 0; i < ARRAY_SIZE(mfp_table); i++) | ||
197 | mfp_table[i].config = -1; | ||
198 | } | ||
199 | |||
200 | #ifdef CONFIG_PM | 26 | #ifdef CONFIG_PM |
201 | /* | 27 | /* |
202 | * Configure the MFPs appropriately for suspend/resume. | 28 | * Configure the MFPs appropriately for suspend/resume. |
@@ -207,23 +33,13 @@ void __init pxa3xx_init_mfp(void) | |||
207 | */ | 33 | */ |
208 | static int pxa3xx_mfp_suspend(struct sys_device *d, pm_message_t state) | 34 | static int pxa3xx_mfp_suspend(struct sys_device *d, pm_message_t state) |
209 | { | 35 | { |
210 | int pin; | 36 | mfp_config_lpm(); |
211 | |||
212 | for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++) { | ||
213 | struct pxa3xx_mfp_pin *p = &mfp_table[pin]; | ||
214 | __mfp_config_lpm(p); | ||
215 | } | ||
216 | return 0; | 37 | return 0; |
217 | } | 38 | } |
218 | 39 | ||
219 | static int pxa3xx_mfp_resume(struct sys_device *d) | 40 | static int pxa3xx_mfp_resume(struct sys_device *d) |
220 | { | 41 | { |
221 | int pin; | 42 | mfp_config_run(); |
222 | |||
223 | for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++) { | ||
224 | struct pxa3xx_mfp_pin *p = &mfp_table[pin]; | ||
225 | __mfp_config_run(p); | ||
226 | } | ||
227 | 43 | ||
228 | /* clear RDH bit when MFP settings are restored | 44 | /* clear RDH bit when MFP settings are restored |
229 | * | 45 | * |
@@ -231,7 +47,6 @@ static int pxa3xx_mfp_resume(struct sys_device *d) | |||
231 | * preserve them here in case they will be referenced later | 47 | * preserve them here in case they will be referenced later |
232 | */ | 48 | */ |
233 | ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); | 49 | ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); |
234 | |||
235 | return 0; | 50 | return 0; |
236 | } | 51 | } |
237 | #else | 52 | #else |
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c index 37bb12d13ca2..4ba6d21f851c 100644 --- a/arch/arm/mach-pxa/pxa300.c +++ b/arch/arm/mach-pxa/pxa300.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include "devices.h" | 23 | #include "devices.h" |
24 | #include "clock.h" | 24 | #include "clock.h" |
25 | 25 | ||
26 | static struct pxa3xx_mfp_addr_map pxa300_mfp_addr_map[] __initdata = { | 26 | static struct mfp_addr_map pxa300_mfp_addr_map[] __initdata = { |
27 | 27 | ||
28 | MFP_ADDR_X(GPIO0, GPIO2, 0x00b4), | 28 | MFP_ADDR_X(GPIO0, GPIO2, 0x00b4), |
29 | MFP_ADDR_X(GPIO3, GPIO26, 0x027c), | 29 | MFP_ADDR_X(GPIO3, GPIO26, 0x027c), |
@@ -72,7 +72,7 @@ static struct pxa3xx_mfp_addr_map pxa300_mfp_addr_map[] __initdata = { | |||
72 | }; | 72 | }; |
73 | 73 | ||
74 | /* override pxa300 MFP register addresses */ | 74 | /* override pxa300 MFP register addresses */ |
75 | static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = { | 75 | static struct mfp_addr_map pxa310_mfp_addr_map[] __initdata = { |
76 | MFP_ADDR_X(GPIO30, GPIO98, 0x0418), | 76 | MFP_ADDR_X(GPIO30, GPIO98, 0x0418), |
77 | MFP_ADDR_X(GPIO7_2, GPIO12_2, 0x052C), | 77 | MFP_ADDR_X(GPIO7_2, GPIO12_2, 0x052C), |
78 | 78 | ||
@@ -98,13 +98,13 @@ static struct clk_lookup pxa310_clkregs[] = { | |||
98 | static int __init pxa300_init(void) | 98 | static int __init pxa300_init(void) |
99 | { | 99 | { |
100 | if (cpu_is_pxa300() || cpu_is_pxa310()) { | 100 | if (cpu_is_pxa300() || cpu_is_pxa310()) { |
101 | pxa3xx_init_mfp(); | 101 | mfp_init_base(io_p2v(MFPR_BASE)); |
102 | pxa3xx_mfp_init_addr(pxa300_mfp_addr_map); | 102 | mfp_init_addr(pxa300_mfp_addr_map); |
103 | clks_register(ARRAY_AND_SIZE(common_clkregs)); | 103 | clks_register(ARRAY_AND_SIZE(common_clkregs)); |
104 | } | 104 | } |
105 | 105 | ||
106 | if (cpu_is_pxa310()) { | 106 | if (cpu_is_pxa310()) { |
107 | pxa3xx_mfp_init_addr(pxa310_mfp_addr_map); | 107 | mfp_init_addr(pxa310_mfp_addr_map); |
108 | clks_register(ARRAY_AND_SIZE(pxa310_clkregs)); | 108 | clks_register(ARRAY_AND_SIZE(pxa310_clkregs)); |
109 | } | 109 | } |
110 | 110 | ||
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c index e708f4e0ecaf..8b3d97efadab 100644 --- a/arch/arm/mach-pxa/pxa320.c +++ b/arch/arm/mach-pxa/pxa320.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include "devices.h" | 23 | #include "devices.h" |
24 | #include "clock.h" | 24 | #include "clock.h" |
25 | 25 | ||
26 | static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = { | 26 | static struct mfp_addr_map pxa320_mfp_addr_map[] __initdata = { |
27 | 27 | ||
28 | MFP_ADDR_X(GPIO0, GPIO4, 0x0124), | 28 | MFP_ADDR_X(GPIO0, GPIO4, 0x0124), |
29 | MFP_ADDR_X(GPIO5, GPIO9, 0x028C), | 29 | MFP_ADDR_X(GPIO5, GPIO9, 0x028C), |
@@ -86,8 +86,8 @@ static struct clk_lookup pxa320_clkregs[] = { | |||
86 | static int __init pxa320_init(void) | 86 | static int __init pxa320_init(void) |
87 | { | 87 | { |
88 | if (cpu_is_pxa320()) { | 88 | if (cpu_is_pxa320()) { |
89 | pxa3xx_init_mfp(); | 89 | mfp_init_base(io_p2v(MFPR_BASE)); |
90 | pxa3xx_mfp_init_addr(pxa320_mfp_addr_map); | 90 | mfp_init_addr(pxa320_mfp_addr_map); |
91 | clks_register(ARRAY_AND_SIZE(pxa320_clkregs)); | 91 | clks_register(ARRAY_AND_SIZE(pxa320_clkregs)); |
92 | } | 92 | } |
93 | 93 | ||
diff --git a/arch/arm/mach-pxa/pxa930.c b/arch/arm/mach-pxa/pxa930.c index f15dfa55f27f..71131742fffd 100644 --- a/arch/arm/mach-pxa/pxa930.c +++ b/arch/arm/mach-pxa/pxa930.c | |||
@@ -18,7 +18,7 @@ | |||
18 | 18 | ||
19 | #include <mach/pxa930.h> | 19 | #include <mach/pxa930.h> |
20 | 20 | ||
21 | static struct pxa3xx_mfp_addr_map pxa930_mfp_addr_map[] __initdata = { | 21 | static struct mfp_addr_map pxa930_mfp_addr_map[] __initdata = { |
22 | 22 | ||
23 | MFP_ADDR(GPIO0, 0x02e0), | 23 | MFP_ADDR(GPIO0, 0x02e0), |
24 | MFP_ADDR(GPIO1, 0x02dc), | 24 | MFP_ADDR(GPIO1, 0x02dc), |
@@ -179,8 +179,8 @@ static struct pxa3xx_mfp_addr_map pxa930_mfp_addr_map[] __initdata = { | |||
179 | static int __init pxa930_init(void) | 179 | static int __init pxa930_init(void) |
180 | { | 180 | { |
181 | if (cpu_is_pxa930()) { | 181 | if (cpu_is_pxa930()) { |
182 | pxa3xx_init_mfp(); | 182 | mfp_init_base(io_p2v(MFPR_BASE)); |
183 | pxa3xx_mfp_init_addr(pxa930_mfp_addr_map); | 183 | mfp_init_addr(pxa930_mfp_addr_map); |
184 | } | 184 | } |
185 | 185 | ||
186 | return 0; | 186 | return 0; |