Merge branch 'viper-for-rmk' of git://www.misterjones.org/linux-2.6-arm

Merge branch 'pxa-viper' into pxa-machines

Conflicts:

	arch/arm/mach-pxa/Makefile
	drivers/pcmcia/Kconfig
	drivers/pcmcia/Makefile

7 files changed, 1090 insertions, 17 deletions

diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 5548abd6390c..f781873431f3 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -38,16 +38,19 @@ config ARCH_LUBBOCK
         bool "Intel DBPXA250 Development Platform"
         select PXA25x
         select SA1111
+        select PXA_HAVE_BOARD_IRQS
 
 config MACH_LOGICPD_PXA270
         bool "LogicPD PXA270 Card Engine Development Platform"
         select PXA27x
         select HAVE_PWM
+        select PXA_HAVE_BOARD_IRQS
 
 config MACH_MAINSTONE
         bool "Intel HCDDBBVA0 Development Platform"
         select PXA27x
         select HAVE_PWM
+        select PXA_HAVE_BOARD_IRQS
 
 config MACH_MP900C
         bool "Nec Mobilepro 900/c"
@@ -118,10 +121,21 @@ config MACH_TOSA
         bool "Enable Sharp SL-6000x (Tosa) Support"
         depends on PXA_SHARPSL
         select PXA25x
+        select PXA_HAVE_BOARD_IRQS
+
+config ARCH_VIPER
+        bool "Arcom/Eurotech VIPER SBC"
+        select PXA25x
+        select ISA
+        select I2C_GPIO
+        select HAVE_PWM
+        select PXA_HAVE_BOARD_IRQS
+        select PXA_HAVE_ISA_IRQS
 
 config ARCH_PXA_ESERIES
         bool "PXA based Toshiba e-series PDAs"
         select PXA25x
+        select PXA_HAVE_BOARD_IRQS
 
 config MACH_E330
         bool "Toshiba e330"
@@ -255,6 +269,7 @@ config MACH_MAGICIAN
         bool "Enable HTC Magician Support"
         select PXA27x
         select IWMMXT
+        select PXA_HAVE_BOARD_IRQS
 
 config MACH_MIOA701
         bool "Mitac Mio A701 Support"
@@ -273,6 +288,7 @@ config MACH_PCM027
         select PXA27x
         select IWMMXT
         select PXA_SSP
+        select PXA_HAVE_BOARD_IRQS
 
 config ARCH_PXA_PALM
         bool "PXA based Palm PDAs"
@@ -408,4 +424,10 @@ config TOSA_BT
           This is a simple driver that is able to control
           the state of built in bluetooth chip on tosa.
 
+config PXA_HAVE_BOARD_IRQS
+        bool
+
+config PXA_HAVE_ISA_IRQS
+        bool
+
 endif
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 30936e40fea6..3d2dea4afb87 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -39,13 +39,16 @@ obj-$(CONFIG_MACH_TOSA)		+= tosa.o
 obj-$(CONFIG_MACH_EM_X270)      += em-x270.o
 obj-$(CONFIG_MACH_MAGICIAN)     += magician.o
 obj-$(CONFIG_MACH_MIOA701)      += mioa701.o mioa701_bootresume.o
-obj-$(CONFIG_ARCH_PXA_ESERIES)  += eseries.o eseries_udc.o
-obj-$(CONFIG_MACH_E740)         += e740_lcd.o
-obj-$(CONFIG_MACH_E750)         += e750_lcd.o
-obj-$(CONFIG_MACH_E400)         += e400_lcd.o
-obj-$(CONFIG_MACH_E800)         += e800_lcd.o
+obj-$(CONFIG_ARCH_PXA_ESERIES)  += eseries.o
+obj-$(CONFIG_MACH_E330)         += e330.o
+obj-$(CONFIG_MACH_E350)         += e350.o
+obj-$(CONFIG_MACH_E740)         += e740.o
+obj-$(CONFIG_MACH_E750)         += e750.o
+obj-$(CONFIG_MACH_E400)         += e400.o
+obj-$(CONFIG_MACH_E800)         += e800.o
 obj-$(CONFIG_MACH_PALMTX)       += palmtx.o
 obj-$(CONFIG_MACH_PALMZ72)      += palmz72.o
+obj-$(CONFIG_ARCH_VIPER)        += viper.o
 
 ifeq ($(CONFIG_MACH_ZYLONITE),y)
   obj-y                         += zylonite.o
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S
index de16c12d5232..f6b4bf3e73d2 100644
--- a/arch/arm/mach-pxa/include/mach/entry-macro.S
+++ b/arch/arm/mach-pxa/include/mach/entry-macro.S
@@ -41,7 +41,7 @@
                 and     \irqstat, \irqstat, \irqnr
                 clz     \irqnr, \irqstat
                 rsb     \irqnr, \irqnr, #31
-                add     \irqnr, \irqnr, #32
+                add     \irqnr, \irqnr, #(32 + PXA_IRQ(0))
                 b       1001f
 1003:
                 mrc     p6, 0, \irqstat, c0, c0, 0      @ ICIP
@@ -52,6 +52,6 @@
                 rsb     \irqstat, \irqnr, #0
                 and     \irqstat, \irqstat, \irqnr
                 clz     \irqnr, \irqstat
-                rsb     \irqnr, \irqnr, #31
+                rsb     \irqnr, \irqnr, #(31 + PXA_IRQ(0))
 1001:
                 .endm
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 108b5db9b2af..9c163e19ada9 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -11,7 +11,14 @@
  */
 
 
-#define PXA_IRQ(x)      (x)
+#ifdef CONFIG_PXA_HAVE_ISA_IRQS
+#define PXA_ISA_IRQ(x)  (x)
+#define PXA_ISA_IRQ_NUM (16)
+#else
+#define PXA_ISA_IRQ_NUM (0)
+#endif
+
+#define PXA_IRQ(x)      (PXA_ISA_IRQ_NUM + (x))
 
 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 #define IRQ_SSP3        PXA_IRQ(0)      /* SSP3 service request */
@@ -73,7 +80,7 @@
 #define IRQ_MMC3        PXA_IRQ(55)     /* MMC3 Controller (PXA310) */
 #endif
 
-#define PXA_GPIO_IRQ_BASE       (64)
+#define PXA_GPIO_IRQ_BASE       PXA_IRQ(64)
 #define PXA_GPIO_IRQ_NUM        (128)
 
 #define GPIO_2_x_TO_IRQ(x)      (PXA_GPIO_IRQ_BASE + (x))
@@ -178,13 +185,7 @@
 #define NR_IRQS                 (IRQ_S1_BVD1_STSCHG + 1)
 #elif defined(CONFIG_SHARP_LOCOMO)
 #define NR_IRQS                 (IRQ_LOCOMO_SPI_TEND + 1)
-#elif defined(CONFIG_ARCH_LUBBOCK) || \
-      defined(CONFIG_MACH_LOGICPD_PXA270) || \
-      defined(CONFIG_MACH_TOSA) || \
-      defined(CONFIG_MACH_MAINSTONE) || \
-      defined(CONFIG_MACH_PCM027) || \
-      defined(CONFIG_ARCH_PXA_ESERIES) || \
-      defined(CONFIG_MACH_MAGICIAN)
+#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
 #define NR_IRQS                 (IRQ_BOARD_END)
 #elif defined(CONFIG_MACH_ZYLONITE)
 #define NR_IRQS                 (IRQ_BOARD_START + 32)
diff --git a/arch/arm/mach-pxa/include/mach/viper.h b/arch/arm/mach-pxa/include/mach/viper.h
new file mode 100644
index 000000000000..10988c270ca3
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/viper.h
@@ -0,0 +1,96 @@
+/*
+ * arch/arm/mach-pxa/include/mach/viper.h
+ *
+ * Author:      Ian Campbell
+ * Created:     Feb 03, 2003
+ * Copyright:   Arcom Control Systems.
+ *
+ * Maintained by Marc Zyngier <maz@misterjones.org>
+ *                            <marc.zyngier@altran.com>
+ *
+ * Created based on lubbock.h:
+ *  Author:     Nicolas Pitre
+ *  Created:    Jun 15, 2001
+ *  Copyright:  MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef ARCH_VIPER_H
+#define ARCH_VIPER_H
+
+#define VIPER_BOOT_PHYS         PXA_CS0_PHYS
+#define VIPER_FLASH_PHYS        PXA_CS1_PHYS
+#define VIPER_ETH_PHYS          PXA_CS2_PHYS
+#define VIPER_USB_PHYS          PXA_CS3_PHYS
+#define VIPER_ETH_DATA_PHYS     PXA_CS4_PHYS
+#define VIPER_CPLD_PHYS         PXA_CS5_PHYS
+
+#define VIPER_CPLD_BASE         (0xf0000000)
+#define VIPER_PC104IO_BASE      (0xf1000000)
+#define VIPER_USB_BASE          (0xf1800000)
+
+#define VIPER_ETH_GPIO          (0)
+#define VIPER_CPLD_GPIO         (1)
+#define VIPER_USB_GPIO          (2)
+#define VIPER_UARTA_GPIO        (4)
+#define VIPER_UARTB_GPIO        (3)
+#define VIPER_CF_CD_GPIO        (32)
+#define VIPER_CF_RDY_GPIO       (8)
+#define VIPER_BCKLIGHT_EN_GPIO  (9)
+#define VIPER_LCD_EN_GPIO       (10)
+#define VIPER_PSU_DATA_GPIO     (6)
+#define VIPER_PSU_CLK_GPIO      (11)
+#define VIPER_UART_SHDN_GPIO    (12)
+#define VIPER_BRIGHTNESS_GPIO   (16)
+#define VIPER_PSU_nCS_LD_GPIO   (19)
+#define VIPER_UPS_GPIO          (20)
+#define VIPER_CF_POWER_GPIO     (82)
+#define VIPER_TPM_I2C_SDA_GPIO  (26)
+#define VIPER_TPM_I2C_SCL_GPIO  (27)
+#define VIPER_RTC_I2C_SDA_GPIO  (83)
+#define VIPER_RTC_I2C_SCL_GPIO  (84)
+
+#define VIPER_CPLD_P2V(x)       ((x) - VIPER_CPLD_PHYS + VIPER_CPLD_BASE)
+#define VIPER_CPLD_V2P(x)       ((x) - VIPER_CPLD_BASE + VIPER_CPLD_PHYS)
+
+#ifndef __ASSEMBLY__
+#  define __VIPER_CPLD_REG(x)   (*((volatile u16 *)VIPER_CPLD_P2V(x)))
+#endif
+
+/* board level registers in the CPLD: (offsets from CPLD_BASE) ... */
+
+/* ... Physical addresses */
+#define _VIPER_LO_IRQ_STATUS    (VIPER_CPLD_PHYS + 0x100000)
+#define _VIPER_ICR_PHYS         (VIPER_CPLD_PHYS + 0x100002)
+#define _VIPER_HI_IRQ_STATUS    (VIPER_CPLD_PHYS + 0x100004)
+#define _VIPER_VERSION_PHYS     (VIPER_CPLD_PHYS + 0x100006)
+#define VIPER_UARTA_PHYS        (VIPER_CPLD_PHYS + 0x300010)
+#define VIPER_UARTB_PHYS        (VIPER_CPLD_PHYS + 0x300000)
+#define _VIPER_SRAM_BASE        (VIPER_CPLD_PHYS + 0x800000)
+
+/* ... Virtual addresses */
+#define VIPER_LO_IRQ_STATUS     __VIPER_CPLD_REG(_VIPER_LO_IRQ_STATUS)
+#define VIPER_HI_IRQ_STATUS     __VIPER_CPLD_REG(_VIPER_HI_IRQ_STATUS)
+#define VIPER_VERSION           __VIPER_CPLD_REG(_VIPER_VERSION_PHYS)
+#define VIPER_ICR               __VIPER_CPLD_REG(_VIPER_ICR_PHYS)
+
+/* Decode VIPER_VERSION register */
+#define VIPER_CPLD_REVISION(x)  (((x) >> 5) & 0x7)
+#define VIPER_BOARD_VERSION(x)  (((x) >> 3) & 0x3)
+#define VIPER_BOARD_ISSUE(x)    (((x) >> 0) & 0x7)
+
+/* Interrupt and Configuration Register (VIPER_ICR) */
+/* This is a write only register. Only CF_RST is used under Linux */
+
+extern void viper_cf_rst(int state);
+
+#define VIPER_ICR_RETRIG        (1 << 0)
+#define VIPER_ICR_AUTO_CLR      (1 << 1)
+#define VIPER_ICR_R_DIS         (1 << 2)
+#define VIPER_ICR_CF_RST        (1 << 3)
+
+#endif
+
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 5e95c5372fec..fa69c3a6a38e 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -57,7 +57,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
 
         pxa_internal_irq_nr = irq_nr;
 
-        for (irq = 0; irq < irq_nr; irq += 32) {
+        for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) {
                 _ICMR(irq) = 0; /* disable all IRQs */
                 _ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */
         }
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
new file mode 100644
index 000000000000..d7632f63603c
--- /dev/null
+++ b/arch/arm/mach-pxa/viper.c
@@ -0,0 +1,951 @@
+/*
+ *  linux/arch/arm/mach-pxa/viper.c
+ *
+ *  Support for the Arcom VIPER SBC.
+ *
+ *  Author:     Ian Campbell
+ *  Created:    Feb 03, 2003
+ *  Copyright:  Arcom Control Systems
+ *
+ *  Maintained by Marc Zyngier <maz@misterjones.org>
+ *                             <marc.zyngier@altran.com>
+ *
+ * Based on lubbock.c:
+ *  Author:     Nicolas Pitre
+ *  Created:    Jun 15, 2001
+ *  Copyright:  MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/types.h>
+#include <linux/memory.h>
+#include <linux/cpu.h>
+#include <linux/cpufreq.h>
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/major.h>
+#include <linux/module.h>
+#include <linux/pm.h>
+#include <linux/sched.h>
+#include <linux/gpio.h>
+#include <linux/i2c-gpio.h>
+#include <linux/serial_8250.h>
+#include <linux/smc91x.h>
+#include <linux/pwm_backlight.h>
+#include <linux/usb/isp116x.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+
+#include <mach/pxa-regs.h>
+#include <mach/pxa2xx-regs.h>
+#include <mach/bitfield.h>
+#include <mach/audio.h>
+#include <mach/pxafb.h>
+#include <mach/mfp-pxa25x.h>
+#include <mach/i2c.h>
+#include <mach/viper.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+#include <asm/sizes.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include "generic.h"
+#include "devices.h"
+
+static unsigned int icr;
+
+static void viper_icr_set_bit(unsigned int bit)
+{
+        icr |= bit;
+        VIPER_ICR = icr;
+}
+
+static void viper_icr_clear_bit(unsigned int bit)
+{
+        icr &= ~bit;
+        VIPER_ICR = icr;
+}
+
+/* This function is used from the pcmcia module to reset the CF */
+void viper_cf_rst(int state)
+{
+        if (state)
+                viper_icr_set_bit(VIPER_ICR_CF_RST);
+        else
+                viper_icr_clear_bit(VIPER_ICR_CF_RST);
+}
+EXPORT_SYMBOL(viper_cf_rst);
+
+/*
+ * The CPLD version register was not present on VIPER boards prior to
+ * v2i1. On v1 boards where the version register is not present we
+ * will just read back the previous value from the databus.
+ *
+ * Therefore we do two reads. The first time we write 0 to the
+ * (read-only) register before reading and the second time we write
+ * 0xff first. If the two reads do not match or they read back as 0xff
+ * or 0x00 then we have version 1 hardware.
+ */
+static u8 viper_hw_version(void)
+{
+        u8 v1, v2;
+        unsigned long flags;
+
+        local_irq_save(flags);
+
+        VIPER_VERSION = 0;
+        v1 = VIPER_VERSION;
+        VIPER_VERSION = 0xff;
+        v2 = VIPER_VERSION;
+
+        v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
+
+        local_irq_restore(flags);
+        return v1;
+}
+
+/* CPU sysdev */
+static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state)
+{
+        viper_icr_set_bit(VIPER_ICR_R_DIS);
+        return 0;
+}
+
+static int viper_cpu_resume(struct sys_device *sysdev)
+{
+        viper_icr_clear_bit(VIPER_ICR_R_DIS);
+        return 0;
+}
+
+static struct sysdev_driver viper_cpu_sysdev_driver = {
+        .suspend        = viper_cpu_suspend,
+        .resume         = viper_cpu_resume,
+};
+
+static unsigned int current_voltage_divisor;
+
+/*
+ * If force is not true then step from existing to new divisor. If
+ * force is true then jump straight to the new divisor. Stepping is
+ * used because if the jump in voltage is too large, the VCC can dip
+ * too low and the regulator cuts out.
+ *
+ * force can be used to initialize the divisor to a know state by
+ * setting the value for the current clock speed, since we are already
+ * running at that speed we know the voltage should be pretty close so
+ * the jump won't be too large
+ */
+static void viper_set_core_cpu_voltage(unsigned long khz, int force)
+{
+        int i = 0;
+        unsigned int divisor = 0;
+        const char *v;
+
+        if (khz < 200000) {
+                v = "1.0"; divisor = 0xfff;
+        } else if (khz < 300000) {
+                v = "1.1"; divisor = 0xde5;
+        } else {
+                v = "1.3"; divisor = 0x325;
+        }
+
+        pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
+                 v, (int)khz / 1000, (int)khz % 1000);
+
+#define STEP 0x100
+        do {
+                int step;
+
+                if (force)
+                        step = divisor;
+                else if (current_voltage_divisor < divisor - STEP)
+                        step = current_voltage_divisor + STEP;
+                else if (current_voltage_divisor > divisor + STEP)
+                        step = current_voltage_divisor - STEP;
+                else
+                        step = divisor;
+                force = 0;
+
+                gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
+                gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
+
+                for (i = 1 << 11 ; i > 0 ; i >>= 1) {
+                        udelay(1);
+
+                        gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
+                        udelay(1);
+
+                        gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
+                        udelay(1);
+
+                        gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
+                }
+                udelay(1);
+
+                gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
+                udelay(1);
+
+                gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
+
+                current_voltage_divisor = step;
+        } while (current_voltage_divisor != divisor);
+}
+
+/* Interrupt handling */
+static unsigned long viper_irq_enabled_mask;
+
+static void viper_ack_irq(unsigned int irq)
+{
+        int viper_irq = irq - PXA_ISA_IRQ(0);
+
+        if (viper_irq < 8)
+                VIPER_LO_IRQ_STATUS = 1 << viper_irq;
+        else
+                VIPER_HI_IRQ_STATUS = 1 << (viper_irq - 8);
+}
+
+static void viper_mask_irq(unsigned int irq)
+{
+        viper_irq_enabled_mask &= ~(1 << (irq - PXA_ISA_IRQ(0)));
+}
+
+static void viper_unmask_irq(unsigned int irq)
+{
+        viper_irq_enabled_mask |= (1 << (irq - PXA_ISA_IRQ(0)));
+}
+
+static inline unsigned long viper_irq_pending(void)
+{
+        return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
+                        viper_irq_enabled_mask;
+}
+
+static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+        unsigned long pending;
+
+        pending = viper_irq_pending();
+        do {
+                if (likely(pending)) {
+                        irq = PXA_ISA_IRQ(0) + __ffs(pending);
+                        generic_handle_irq(irq);
+                }
+                pending = viper_irq_pending();
+        } while (pending);
+}
+
+static struct irq_chip viper_irq_chip = {
+        .name   = "ISA",
+        .ack    = viper_ack_irq,
+        .mask   = viper_mask_irq,
+        .unmask = viper_unmask_irq
+};
+
+static void __init viper_init_irq(void)
+{
+        const int isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
+        int irq;
+        int isa_irq;
+
+        pxa25x_init_irq();
+
+        /* setup ISA IRQs */
+        for (irq = 0; irq < ARRAY_SIZE(isa_irqs); irq++) {
+                isa_irq = isa_irqs[irq];
+                set_irq_chip(isa_irq, &viper_irq_chip);
+                set_irq_handler(isa_irq, handle_edge_irq);
+                set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
+        }
+
+        set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
+                                viper_irq_handler);
+        set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
+
+#ifndef CONFIG_SERIAL_PXA
+        /*
+         * 8250 doesn't support IRQ_TYPE being passed as part
+         * of the plat_serial8250_port structure...
+         */
+        set_irq_type(gpio_to_irq(VIPER_UARTA_GPIO), IRQ_TYPE_EDGE_RISING);
+        set_irq_type(gpio_to_irq(VIPER_UARTB_GPIO), IRQ_TYPE_EDGE_RISING);
+#endif
+}
+
+/* Flat Panel */
+static struct pxafb_mode_info fb_mode_info[] = {
+        {
+                .pixclock       = 157500,
+
+                .xres           = 320,
+                .yres           = 240,
+
+                .bpp            = 16,
+
+                .hsync_len      = 63,
+                .left_margin    = 7,
+                .right_margin   = 13,
+
+                .vsync_len      = 20,
+                .upper_margin   = 0,
+                .lower_margin   = 0,
+
+                .sync           = 0,
+        },
+};
+
+static struct pxafb_mach_info fb_info = {
+        .modes                  = fb_mode_info,
+        .num_modes              = 1,
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
+};
+
+static int viper_backlight_init(struct device *dev)
+{
+        int ret;
+
+        /* GPIO9 and 10 control FB backlight. Initialise to off */
+        ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
+        if (ret)
+                goto err_request_bckl;
+
+        ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
+        if (ret)
+                goto err_request_lcd;
+
+        ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
+        if (ret)
+                goto err_dir;
+
+        ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
+        if (ret)
+                goto err_dir;
+
+        return 0;
+
+err_dir:
+        gpio_free(VIPER_LCD_EN_GPIO);
+err_request_lcd:
+        gpio_free(VIPER_BCKLIGHT_EN_GPIO);
+err_request_bckl:
+        dev_err(dev, "Failed to setup LCD GPIOs\n");
+
+        return ret;
+}
+
+static int viper_backlight_notify(int brightness)
+{
+        gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
+        gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
+
+        return brightness;
+}
+
+static void viper_backlight_exit(struct device *dev)
+{
+        gpio_free(VIPER_LCD_EN_GPIO);
+        gpio_free(VIPER_BCKLIGHT_EN_GPIO);
+}
+
+static struct platform_pwm_backlight_data viper_backlight_data = {
+        .pwm_id         = 0,
+        .max_brightness = 100,
+        .dft_brightness = 100,
+        .pwm_period_ns  = 1000000,
+        .init           = viper_backlight_init,
+        .notify         = viper_backlight_notify,
+        .exit           = viper_backlight_exit,
+};
+
+static struct platform_device viper_backlight_device = {
+        .name           = "pwm-backlight",
+        .dev            = {
+                .parent         = &pxa25x_device_pwm0.dev,
+                .platform_data  = &viper_backlight_data,
+        },
+};
+
+/* Ethernet */
+static struct resource smc91x_resources[] = {
+        [0] = {
+                .name   = "smc91x-regs",
+                .start  = VIPER_ETH_PHYS + 0x300,
+                .end    = VIPER_ETH_PHYS + 0x30f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = gpio_to_irq(VIPER_ETH_GPIO),
+                .end    = gpio_to_irq(VIPER_ETH_GPIO),
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+        },
+        [2] = {
+                .name   = "smc91x-data32",
+                .start  = VIPER_ETH_DATA_PHYS,
+                .end    = VIPER_ETH_DATA_PHYS + 3,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct smc91x_platdata viper_smc91x_info = {
+        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda   = RPC_LED_100_10,
+        .ledb   = RPC_LED_TX_RX,
+};
+
+static struct platform_device smc91x_device = {
+        .name           = "smc91x",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(smc91x_resources),
+        .resource       = smc91x_resources,
+        .dev            = {
+                .platform_data  = &viper_smc91x_info,
+        },
+};
+
+/* i2c */
+static struct i2c_gpio_platform_data i2c_bus_data = {
+        .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
+        .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
+        .udelay  = 10,
+        .timeout = 100,
+};
+
+static struct platform_device i2c_bus_device = {
+        .name           = "i2c-gpio",
+        .id             = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
+        .dev = {
+                .platform_data = &i2c_bus_data,
+        }
+};
+
+static struct i2c_board_info __initdata viper_i2c_devices[] = {
+        {
+                I2C_BOARD_INFO("ds1338", 0x68),
+        },
+};
+
+/*
+ * Serial configuration:
+ * You can either have the standard PXA ports driven by the PXA driver,
+ * or all the ports (PXA + 16850) driven by the 8250 driver.
+ * Choose your poison.
+ */
+
+static struct resource viper_serial_resources[] = {
+#ifndef CONFIG_SERIAL_PXA
+        {
+                .start  = 0x40100000,
+                .end    = 0x4010001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = 0x40200000,
+                .end    = 0x4020001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = 0x40700000,
+                .end    = 0x4070001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = VIPER_UARTA_PHYS,
+                .end    = VIPER_UARTA_PHYS + 0xf,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = VIPER_UARTB_PHYS,
+                .end    = VIPER_UARTB_PHYS + 0xf,
+                .flags  = IORESOURCE_MEM,
+        },
+#else
+        {
+                0,
+        },
+#endif
+};
+
+static struct plat_serial8250_port serial_platform_data[] = {
+#ifndef CONFIG_SERIAL_PXA
+        /* Internal UARTs */
+        {
+                .membase        = (void *)&FFUART,
+                .mapbase        = __PREG(FFUART),
+                .irq            = IRQ_FFUART,
+                .uartclk        = 921600 * 16,
+                .regshift       = 2,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+                .iotype         = UPIO_MEM,
+        },
+        {
+                .membase        = (void *)&BTUART,
+                .mapbase        = __PREG(BTUART),
+                .irq            = IRQ_BTUART,
+                .uartclk        = 921600 * 16,
+                .regshift       = 2,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+                .iotype         = UPIO_MEM,
+        },
+        {
+                .membase        = (void *)&STUART,
+                .mapbase        = __PREG(STUART),
+                .irq            = IRQ_STUART,
+                .uartclk        = 921600 * 16,
+                .regshift       = 2,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+                .iotype         = UPIO_MEM,
+        },
+        /* External UARTs */
+        {
+                .mapbase        = VIPER_UARTA_PHYS,
+                .irq            = gpio_to_irq(VIPER_UARTA_GPIO),
+                .uartclk        = 1843200,
+                .regshift       = 1,
+                .iotype         = UPIO_MEM,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
+                                  UPF_SKIP_TEST,
+        },
+        {
+                .mapbase        = VIPER_UARTB_PHYS,
+                .irq            = gpio_to_irq(VIPER_UARTB_GPIO),
+                .uartclk        = 1843200,
+                .regshift       = 1,
+                .iotype         = UPIO_MEM,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
+                                  UPF_SKIP_TEST,
+        },
+#endif
+        { },
+};
+
+static struct platform_device serial_device = {
+        .name                   = "serial8250",
+        .id                     = 0,
+        .dev                    = {
+                .platform_data  = serial_platform_data,
+        },
+        .num_resources          = ARRAY_SIZE(viper_serial_resources),
+        .resource               = viper_serial_resources,
+};
+
+/* USB */
+static void isp116x_delay(struct device *dev, int delay)
+{
+        ndelay(delay);
+}
+
+static struct resource isp116x_resources[] = {
+        [0] = { /* DATA */
+                .start  = VIPER_USB_PHYS + 0,
+                .end    = VIPER_USB_PHYS + 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = { /* ADDR */
+                .start  = VIPER_USB_PHYS + 2,
+                .end    = VIPER_USB_PHYS + 3,
+                .flags  = IORESOURCE_MEM,
+        },
+        [2] = {
+                .start  = gpio_to_irq(VIPER_USB_GPIO),
+                .end    = gpio_to_irq(VIPER_USB_GPIO),
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+        },
+};
+
+/* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
+static struct isp116x_platform_data isp116x_platform_data = {
+        /* Enable internal resistors on downstream ports */
+        .sel15Kres              = 1,
+        /* On-chip overcurrent protection */
+        .oc_enable              = 1,
+        /* INT output polarity */
+        .int_act_high           = 1,
+        /* INT edge or level triggered */
+        .int_edge_triggered     = 0,
+
+        /* WAKEUP pin connected - NOT SUPPORTED  */
+        /* .remote_wakeup_connected = 0, */
+        /* Wakeup by devices on usb bus enabled */
+        .remote_wakeup_enable   = 0,
+        .delay                  = isp116x_delay,
+};
+
+static struct platform_device isp116x_device = {
+        .name                   = "isp116x-hcd",
+        .id                     = -1,
+        .num_resources          = ARRAY_SIZE(isp116x_resources),
+        .resource               = isp116x_resources,
+        .dev                    = {
+                .platform_data  = &isp116x_platform_data,
+        },
+
+};
+
+/* MTD */
+static struct resource mtd_resources[] = {
+        [0] = { /* RedBoot config + filesystem flash */
+                .start  = VIPER_FLASH_PHYS,
+                .end    = VIPER_FLASH_PHYS + SZ_32M - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = { /* Boot flash */
+                .start  = VIPER_BOOT_PHYS,
+                .end    = VIPER_BOOT_PHYS + SZ_1M - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [2] = { /*
+                 * SRAM size is actually 256KB, 8bits, with a sparse mapping
+                 * (each byte is on a 16bit boundary).
+                 */
+                .start  = _VIPER_SRAM_BASE,
+                .end    = _VIPER_SRAM_BASE + SZ_512K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct mtd_partition viper_boot_flash_partition = {
+        .name           = "RedBoot",
+        .size           = SZ_1M,
+        .offset         = 0,
+        .mask_flags     = MTD_WRITEABLE,        /* force R/O */
+};
+
+static struct physmap_flash_data viper_flash_data[] = {
+        [0] = {
+                .width          = 2,
+                .parts          = NULL,
+                .nr_parts       = 0,
+        },
+        [1] = {
+                .width          = 2,
+                .parts          = &viper_boot_flash_partition,
+                .nr_parts       = 1,
+        },
+};
+
+static struct platform_device viper_mtd_devices[] = {
+        [0] = {
+                .name           = "physmap-flash",
+                .id             = 0,
+                .dev            = {
+                        .platform_data  = &viper_flash_data[0],
+                },
+                .resource       = &mtd_resources[0],
+                .num_resources  = 1,
+        },
+        [1] = {
+                .name           = "physmap-flash",
+                .id             = 1,
+                .dev            = {
+                        .platform_data  = &viper_flash_data[1],
+                },
+                .resource       = &mtd_resources[1],
+                .num_resources  = 1,
+        },
+};
+
+static struct platform_device *viper_devs[] __initdata = {
+        &smc91x_device,
+        &i2c_bus_device,
+        &serial_device,
+        &isp116x_device,
+        &viper_mtd_devices[0],
+        &viper_mtd_devices[1],
+        &viper_backlight_device,
+};
+
+static mfp_cfg_t viper_pin_config[] __initdata = {
+        /* Chip selects */
+        GPIO15_nCS_1,
+        GPIO78_nCS_2,
+        GPIO79_nCS_3,
+        GPIO80_nCS_4,
+        GPIO33_nCS_5,
+
+        /* FP Backlight */
+        GPIO9_GPIO,                             /* VIPER_BCKLIGHT_EN_GPIO */
+        GPIO10_GPIO,                            /* VIPER_LCD_EN_GPIO */
+        GPIO16_PWM0_OUT,
+
+        /* Ethernet PHY Ready */
+        GPIO18_RDY,
+
+        /* Serial shutdown */
+        GPIO12_GPIO | MFP_LPM_DRIVE_HIGH,       /* VIPER_UART_SHDN_GPIO */
+
+        /* Compact-Flash / PC104 */
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO52_nPCE_1,
+        GPIO53_nPCE_2,
+        GPIO54_nPSKTSEL,
+        GPIO55_nPREG,
+        GPIO56_nPWAIT,
+        GPIO57_nIOIS16,
+        GPIO8_GPIO,                             /* VIPER_CF_RDY_GPIO */
+        GPIO32_GPIO,                            /* VIPER_CF_CD_GPIO */
+        GPIO82_GPIO,                            /* VIPER_CF_POWER_GPIO */
+
+        /* Integrated UPS control */
+        GPIO20_GPIO,                            /* VIPER_UPS_GPIO */
+
+        /* Vcc regulator control */
+        GPIO6_GPIO,                             /* VIPER_PSU_DATA_GPIO */
+        GPIO11_GPIO,                            /* VIPER_PSU_CLK_GPIO */
+        GPIO19_GPIO,                            /* VIPER_PSU_nCS_LD_GPIO */
+
+        /* i2c busses */
+        GPIO26_GPIO,                            /* VIPER_TPM_I2C_SDA_GPIO */
+        GPIO27_GPIO,                            /* VIPER_TPM_I2C_SCL_GPIO */
+        GPIO83_GPIO,                            /* VIPER_RTC_I2C_SDA_GPIO */
+        GPIO84_GPIO,                            /* VIPER_RTC_I2C_SCL_GPIO */
+
+        /* PC/104 Interrupt */
+        GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,       /* VIPER_CPLD_GPIO */
+};
+
+static unsigned long viper_tpm;
+
+static int __init viper_tpm_setup(char *str)
+{
+        strict_strtoul(str, 10, &viper_tpm);
+        return 1;
+}
+
+__setup("tpm=", viper_tpm_setup);
+
+static void __init viper_tpm_init(void)
+{
+        struct platform_device *tpm_device;
+        struct i2c_gpio_platform_data i2c_tpm_data = {
+                .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
+                .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
+                .udelay  = 10,
+                .timeout = 100,
+        };
+        char *errstr;
+
+        /* Allocate TPM i2c bus if requested */
+        if (!viper_tpm)
+                return;
+
+        tpm_device = platform_device_alloc("i2c-gpio", 2);
+        if (tpm_device) {
+                if (!platform_device_add_data(tpm_device,
+                                              &i2c_tpm_data,
+                                              sizeof(i2c_tpm_data))) {
+                        if (platform_device_add(tpm_device)) {
+                                errstr = "register TPM i2c bus";
+                                goto error_free_tpm;
+                        }
+                } else {
+                        errstr = "allocate TPM i2c bus data";
+                        goto error_free_tpm;
+                }
+        } else {
+                errstr = "allocate TPM i2c device";
+                goto error_tpm;
+        }
+
+        return;
+
+error_free_tpm:
+        kfree(tpm_device);
+error_tpm:
+        pr_err("viper: Couldn't %s, giving up\n", errstr);
+}
+
+static void __init viper_init_vcore_gpios(void)
+{
+        if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
+                goto err_request_data;
+
+        if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
+                goto err_request_clk;
+
+        if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
+                goto err_request_cs;
+
+        if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
+            gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
+            gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
+                goto err_dir;
+
+        /* c/should assume redboot set the correct level ??? */
+        viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
+
+        return;
+
+err_dir:
+        gpio_free(VIPER_PSU_nCS_LD_GPIO);
+err_request_cs:
+        gpio_free(VIPER_PSU_CLK_GPIO);
+err_request_clk:
+        gpio_free(VIPER_PSU_DATA_GPIO);
+err_request_data:
+        pr_err("viper: Failed to setup vcore control GPIOs\n");
+}
+
+static void __init viper_init_serial_gpio(void)
+{
+        if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
+                goto err_request;
+
+        if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
+                goto err_dir;
+
+        return;
+
+err_dir:
+        gpio_free(VIPER_UART_SHDN_GPIO);
+err_request:
+        pr_err("viper: Failed to setup UART shutdown GPIO\n");
+}
+
+#ifdef CONFIG_CPU_FREQ
+static int viper_cpufreq_notifier(struct notifier_block *nb,
+                                  unsigned long val, void *data)
+{
+        struct cpufreq_freqs *freq = data;
+
+        /* TODO: Adjust timings??? */
+
+        switch (val) {
+        case CPUFREQ_PRECHANGE:
+                if (freq->old < freq->new) {
+                        /* we are getting faster so raise the voltage
+                         * before we change freq */
+                        viper_set_core_cpu_voltage(freq->new, 0);
+                }
+                break;
+        case CPUFREQ_POSTCHANGE:
+                if (freq->old > freq->new) {
+                        /* we are slowing down so drop the power
+                         * after we change freq */
+                        viper_set_core_cpu_voltage(freq->new, 0);
+                }
+                break;
+        case CPUFREQ_RESUMECHANGE:
+                viper_set_core_cpu_voltage(freq->new, 0);
+                break;
+        default:
+                /* ignore */
+                break;
+        }
+
+        return 0;
+}
+
+static struct notifier_block viper_cpufreq_notifier_block = {
+        .notifier_call  = viper_cpufreq_notifier
+};
+
+static void __init viper_init_cpufreq(void)
+{
+        if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
+                                      CPUFREQ_TRANSITION_NOTIFIER))
+                pr_err("viper: Failed to setup cpufreq notifier\n");
+}
+#else
+static inline void viper_init_cpufreq(void) {}
+#endif
+
+static void viper_power_off(void)
+{
+        pr_notice("Shutting off UPS\n");
+        gpio_set_value(VIPER_UPS_GPIO, 1);
+        /* Spin to death... */
+        while (1);
+}
+
+static void __init viper_init(void)
+{
+        u8 version;
+
+        pm_power_off = viper_power_off;
+
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
+
+        /* Wake-up serial console */
+        viper_init_serial_gpio();
+
+        set_pxa_fb_info(&fb_info);
+
+        /* v1 hardware cannot use the datacs line */
+        version = viper_hw_version();
+        if (version == 0)
+                smc91x_device.num_resources--;
+
+        pxa_set_i2c_info(NULL);
+        platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
+
+        viper_init_vcore_gpios();
+        viper_init_cpufreq();
+
+        sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver);
+
+        if (version) {
+                pr_info("viper: hardware v%di%d detected. "
+                        "CPLD revision %d.\n",
+                        VIPER_BOARD_VERSION(version),
+                        VIPER_BOARD_ISSUE(version),
+                        VIPER_CPLD_REVISION(version));
+                system_rev = (VIPER_BOARD_VERSION(version) << 8) |
+                             (VIPER_BOARD_ISSUE(version) << 4) |
+                             VIPER_CPLD_REVISION(version);
+        } else {
+                pr_info("viper: No version register.\n");
+        }
+
+        i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
+
+        viper_tpm_init();
+        pxa_set_ac97_info(NULL);
+}
+
+static struct map_desc viper_io_desc[] __initdata = {
+        {
+                .virtual = VIPER_CPLD_BASE,
+                .pfn     = __phys_to_pfn(VIPER_CPLD_PHYS),
+                .length  = 0x00300000,
+                .type    = MT_DEVICE,
+        },
+        {
+                .virtual = VIPER_PC104IO_BASE,
+                .pfn     = __phys_to_pfn(_PCMCIA1IO),
+                .length  = 0x00800000,
+                .type    = MT_DEVICE,
+        },
+};
+
+static void __init viper_map_io(void)
+{
+        pxa_map_io();
+
+        iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
+
+        PCFR |= PCFR_OPDE;
+}
+
+MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
+        /* Maintainer: Marc Zyngier <maz@misterjones.org> */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = viper_map_io,
+        .init_irq       = viper_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = viper_init,
+MACHINE_END