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authoreric miao <eric.miao@marvell.com>2008-02-18 22:13:31 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-07-09 16:38:32 -0400
commit7a2c5cb0e2cafd5c3d07df1db8de183283a3b1ac (patch)
tree0f44f51cf4b74a3a5e0b6dfe41443bef44a9180d /arch/arm/mach-pxa
parent566b450c33ea43f339d54d445f4ea1ab2e021909 (diff)
[ARM] pxa: make PXA3xx_CK() and PXA3xx_CKEN() public in clock.h
So processor specific clock sources can be defined in pxa300.c and pxa320.c. Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r--arch/arm/mach-pxa/clock.h24
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c24
2 files changed, 27 insertions, 21 deletions
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index 83cbfaba485d..7bd1bbbb165f 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -52,4 +52,28 @@ extern const struct clkops clk_cken_ops;
52void clk_cken_enable(struct clk *clk); 52void clk_cken_enable(struct clk *clk);
53void clk_cken_disable(struct clk *clk); 53void clk_cken_disable(struct clk *clk);
54 54
55#ifdef CONFIG_PXA3xx
56#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \
57 { \
58 .name = _name, \
59 .dev = _dev, \
60 .ops = &clk_pxa3xx_cken_ops, \
61 .rate = _rate, \
62 .cken = CKEN_##_cken, \
63 .delay = _delay, \
64 }
65
66#define PXA3xx_CK(_name, _cken, _ops, _dev) \
67 { \
68 .name = _name, \
69 .dev = _dev, \
70 .ops = _ops, \
71 .cken = CKEN_##_cken, \
72 }
73
74extern const struct clkops clk_pxa3xx_cken_ops;
75extern void clk_pxa3xx_cken_enable(struct clk *);
76extern void clk_pxa3xx_cken_disable(struct clk *);
77#endif
78
55void clks_register(struct clk *clks, size_t num); 79void clks_register(struct clk *clks, size_t num);
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 15685d2b8f8c..c4a0331ff455 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -144,7 +144,7 @@ static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk)
144 return hsio_clk; 144 return hsio_clk;
145} 145}
146 146
147static void clk_pxa3xx_cken_enable(struct clk *clk) 147void clk_pxa3xx_cken_enable(struct clk *clk)
148{ 148{
149 unsigned long mask = 1ul << (clk->cken & 0x1f); 149 unsigned long mask = 1ul << (clk->cken & 0x1f);
150 150
@@ -154,7 +154,7 @@ static void clk_pxa3xx_cken_enable(struct clk *clk)
154 CKENB |= mask; 154 CKENB |= mask;
155} 155}
156 156
157static void clk_pxa3xx_cken_disable(struct clk *clk) 157void clk_pxa3xx_cken_disable(struct clk *clk)
158{ 158{
159 unsigned long mask = 1ul << (clk->cken & 0x1f); 159 unsigned long mask = 1ul << (clk->cken & 0x1f);
160 160
@@ -164,7 +164,7 @@ static void clk_pxa3xx_cken_disable(struct clk *clk)
164 CKENB &= ~mask; 164 CKENB &= ~mask;
165} 165}
166 166
167static const struct clkops clk_pxa3xx_cken_ops = { 167const struct clkops clk_pxa3xx_cken_ops = {
168 .enable = clk_pxa3xx_cken_enable, 168 .enable = clk_pxa3xx_cken_enable,
169 .disable = clk_pxa3xx_cken_disable, 169 .disable = clk_pxa3xx_cken_disable,
170}; 170};
@@ -196,24 +196,6 @@ static const struct clkops clk_pout_ops = {
196 .disable = clk_pout_disable, 196 .disable = clk_pout_disable,
197}; 197};
198 198
199#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \
200 { \
201 .name = _name, \
202 .dev = _dev, \
203 .ops = &clk_pxa3xx_cken_ops, \
204 .rate = _rate, \
205 .cken = CKEN_##_cken, \
206 .delay = _delay, \
207 }
208
209#define PXA3xx_CK(_name, _cken, _ops, _dev) \
210 { \
211 .name = _name, \
212 .dev = _dev, \
213 .ops = _ops, \
214 .cken = CKEN_##_cken, \
215 }
216
217static struct clk pxa3xx_clks[] = { 199static struct clk pxa3xx_clks[] = {
218 { 200 {
219 .name = "CLK_POUT", 201 .name = "CLK_POUT",