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authorEric Miao <eric.y.miao@gmail.com>2011-04-27 10:48:05 -0400
committerEric Miao <eric.y.miao@gmail.com>2011-07-12 07:50:28 -0400
commita551e4f787220459c6e78668a15cbe01f1ac7637 (patch)
tree06aa0d5c042ea6fd58f22153962f2bc77738cc61 /arch/arm/mach-pxa
parent5d284e353eb11ab2e8b1c5671ba06489b0bd1e0c (diff)
ARM: pxa: introduce {icip,ichp}_handle_irq() to prepare MULTI_IRQ_HANDLER
Thanks Dmitry for providing a fix to the original code. Signed-off-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h3
-rw-r--r--arch/arm/mach-pxa/irq.c32
2 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index a94c694b4af9..564337de9582 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -106,9 +106,12 @@
106 106
107#ifndef __ASSEMBLY__ 107#ifndef __ASSEMBLY__
108struct irq_data; 108struct irq_data;
109struct pt_regs;
109 110
110void pxa_mask_irq(struct irq_data *); 111void pxa_mask_irq(struct irq_data *);
111void pxa_unmask_irq(struct irq_data *); 112void pxa_unmask_irq(struct irq_data *);
113void icip_handle_irq(struct pt_regs *);
114void ichp_handle_irq(struct pt_regs *);
112#endif 115#endif
113 116
114#endif /* __ASM_MACH_IRQS_H */ 117#endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index c89c0e40fe32..b09e848eb6c6 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -37,6 +37,8 @@
37#define IPR(i) (((i) < 32) ? (0x01c + ((i) << 2)) : \ 37#define IPR(i) (((i) < 32) ? (0x01c + ((i) << 2)) : \
38 ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \ 38 ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \
39 (0x144 + (((i) - 64) << 2))) 39 (0x144 + (((i) - 64) << 2)))
40#define ICHP_VAL_IRQ (1 << 31)
41#define ICHP_IRQ(i) (((i) >> 16) & 0x7fff)
40#define IPR_VALID (1 << 31) 42#define IPR_VALID (1 << 31)
41#define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f) 43#define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f)
42 44
@@ -127,6 +129,36 @@ static struct irq_chip pxa_low_gpio_chip = {
127 .irq_set_type = pxa_set_low_gpio_type, 129 .irq_set_type = pxa_set_low_gpio_type,
128}; 130};
129 131
132asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs)
133{
134 uint32_t icip, icmr, mask;
135
136 do {
137 icip = __raw_readl(IRQ_BASE + ICIP);
138 icmr = __raw_readl(IRQ_BASE + ICMR);
139 mask = icip & icmr;
140
141 if (mask == 0)
142 break;
143
144 handle_IRQ(PXA_IRQ(fls(mask) - 1), regs);
145 } while (1);
146}
147
148asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs)
149{
150 uint32_t ichp;
151
152 do {
153 __asm__ __volatile__("mrc p6, 0, %0, c5, c0, 0\n": "=r"(ichp));
154
155 if ((ichp & ICHP_VAL_IRQ) == 0)
156 break;
157
158 handle_IRQ(PXA_IRQ(ICHP_IRQ(ichp)), regs);
159 } while (1);
160}
161
130static void __init pxa_init_low_gpio_irq(set_wake_t fn) 162static void __init pxa_init_low_gpio_irq(set_wake_t fn)
131{ 163{
132 int irq; 164 int irq;