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authorEric Miao <eric.miao@marvell.com>2008-11-16 02:56:58 -0500
committerEric Miao <eric.miao@marvell.com>2008-11-16 03:03:13 -0500
commitfaf2f0ab13d259f2386d156d24c405ec8cee30ff (patch)
tree8af7f093018f5572126b130b782934b7f3210323 /arch/arm/mach-pxa/spitz.c
parent38cd809e675e29ea1c3bce8ed743b0fe8aa10eea (diff)
[ARM] pxa: fix incorrect PCMCIA PSKTSEL pin configuration for spitz
The original incorrect configuration caused GPIO79_nCS_3 being overriden, thus resulted in the NAND flash not being detected. The real PSKTSEL pin is on GPIO104 instead of GPIO79. Signed-off-by: Eric Miao <eric.miao@marvell.com> Cc: Richard Purdie <rpurdie@rpsys.net>
Diffstat (limited to 'arch/arm/mach-pxa/spitz.c')
-rw-r--r--arch/arm/mach-pxa/spitz.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 51db9527f176..3be76ee2bdbf 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -67,6 +67,7 @@
67static unsigned long spitz_pin_config[] __initdata = { 67static unsigned long spitz_pin_config[] __initdata = {
68 /* Chip Selects */ 68 /* Chip Selects */
69 GPIO78_nCS_2, /* SCOOP #2 */ 69 GPIO78_nCS_2, /* SCOOP #2 */
70 GPIO79_nCS_3, /* NAND */
70 GPIO80_nCS_4, /* SCOOP #1 */ 71 GPIO80_nCS_4, /* SCOOP #1 */
71 72
72 /* LCD - 16bpp Active TFT */ 73 /* LCD - 16bpp Active TFT */
@@ -97,10 +98,10 @@ static unsigned long spitz_pin_config[] __initdata = {
97 GPIO51_nPIOW, 98 GPIO51_nPIOW,
98 GPIO85_nPCE_1, 99 GPIO85_nPCE_1,
99 GPIO54_nPCE_2, 100 GPIO54_nPCE_2,
100 GPIO79_PSKTSEL,
101 GPIO55_nPREG, 101 GPIO55_nPREG,
102 GPIO56_nPWAIT, 102 GPIO56_nPWAIT,
103 GPIO57_nIOIS16, 103 GPIO57_nIOIS16,
104 GPIO104_PSKTSEL,
104 105
105 /* MMC */ 106 /* MMC */
106 GPIO32_MMC_CLK, 107 GPIO32_MMC_CLK,