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authorLinus Torvalds <torvalds@g5.osdl.org>2006-10-03 12:14:00 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-03 12:14:00 -0400
commit63c422afe3739b68bec0b5c42807d1450c951caf (patch)
tree2cdbcbd4c6fcea69fbe0b164242336c38168f631 /arch/arm/mach-pxa/spitz.c
parent6f3a28f7d1f0a65a78443c273b6e8ec01becf301 (diff)
parentd14b272bc63f35a8f20b4b1df16c080b8d24f8f1 (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 3848/1: pxafb: Add option of fixing video modes and spitz QVGA mode support [ARM] 3880/1: remove the last trace of iop31x support [ARM] 3879/1: ep93xx: instantiate platform devices for ep93xx ethernet [ARM] 3809/3: get rid of 4 megabyte kernel image size limit [ARM] Fix XIP_KERNEL build error in arch/arm/mm/mmu.c [ARM] 3874/1: Remove leftover usage of asm/timeofday.h
Diffstat (limited to 'arch/arm/mach-pxa/spitz.c')
-rw-r--r--arch/arm/mach-pxa/spitz.c51
1 files changed, 36 insertions, 15 deletions
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 1c32a9310dc2..401cdb850fbc 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -407,21 +407,42 @@ static struct pxaficp_platform_data spitz_ficp_platform_data = {
407/* 407/*
408 * Spitz PXA Framebuffer 408 * Spitz PXA Framebuffer
409 */ 409 */
410static struct pxafb_mach_info spitz_pxafb_info __initdata = { 410
411 .pixclock = 19231, 411static struct pxafb_mode_info spitz_pxafb_modes[] = {
412 .xres = 480, 412{
413 .yres = 640, 413 .pixclock = 19231,
414 .bpp = 16, 414 .xres = 480,
415 .hsync_len = 40, 415 .yres = 640,
416 .left_margin = 46, 416 .bpp = 16,
417 .right_margin = 125, 417 .hsync_len = 40,
418 .vsync_len = 3, 418 .left_margin = 46,
419 .upper_margin = 1, 419 .right_margin = 125,
420 .lower_margin = 0, 420 .vsync_len = 3,
421 .sync = 0, 421 .upper_margin = 1,
422 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act | LCCR0_LDDALT | LCCR0_OUC | LCCR0_CMDIM | LCCR0_RDSTM, 422 .lower_margin = 0,
423 .lccr3 = LCCR3_PixRsEdg | LCCR3_OutEnH, 423 .sync = 0,
424 .pxafb_lcd_power = spitz_lcd_power, 424},{
425 .pixclock = 134617,
426 .xres = 240,
427 .yres = 320,
428 .bpp = 16,
429 .hsync_len = 20,
430 .left_margin = 20,
431 .right_margin = 46,
432 .vsync_len = 2,
433 .upper_margin = 1,
434 .lower_margin = 0,
435 .sync = 0,
436},
437};
438
439static struct pxafb_mach_info spitz_pxafb_info = {
440 .modes = &spitz_pxafb_modes[0],
441 .num_modes = 2,
442 .fixed_modes = 1,
443 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act | LCCR0_LDDALT | LCCR0_OUC | LCCR0_CMDIM | LCCR0_RDSTM,
444 .lccr3 = LCCR3_PixRsEdg | LCCR3_OutEnH,
445 .pxafb_lcd_power = spitz_lcd_power,
425}; 446};
426 447
427 448