diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-21 19:42:32 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-21 19:42:32 -0400 |
commit | b5153163ed580e00c67bdfecb02b2e3843817b3e (patch) | |
tree | b8c878601f07f5df8f694435857a5f3dcfd75482 /arch/arm/mach-pxa/pxa3xx.c | |
parent | a8cbf22559ceefdcdfac00701e8e6da7518b7e8e (diff) | |
parent | 6451d7783ba5ff24eb1a544eaa6665b890f30466 (diff) |
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (278 commits)
arm: remove machine_desc.io_pg_offst and .phys_io
arm: use addruart macro to establish debug mappings
arm: return both physical and virtual addresses from addruart
arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCC
ARM: make struct machine_desc definition coherent with its comment
eukrea_mbimxsd-baseboard: Pass the correct GPIO to gpio_free
cpuimx27: fix compile when ULPI is selected
mach-pcm037_eet: fix compile errors
Fixing ethernet driver compilation error for i.MX31 ADS board
cpuimx51: update board support
mx5: add cpuimx51sd module and its baseboard
iomux-mx51: fix GPIO_1_xx 's IOMUX configuration
imx-esdhc: update devices registration
mx51: add resources for SD/MMC on i.MX51
iomux-mx51: fix SD1 and SD2's iomux configuration
clock-mx51: rename CLOCK1 to CLOCK_CCGR for better readability
clock-mx51: factorize clk_set_parent and clk_get_rate
eukrea_mbimxsd: add support for DVI displays
cpuimx25 & cpuimx35: fix OTG port registration in host mode
i.MX31 and i.MX35 : fix errate TLSbo65953 and ENGcm09472
...
Diffstat (limited to 'arch/arm/mach-pxa/pxa3xx.c')
-rw-r--r-- | arch/arm/mach-pxa/pxa3xx.c | 19 |
1 files changed, 1 insertions, 18 deletions
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index fa0014847c71..c85c3a7abd31 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
@@ -98,23 +98,6 @@ unsigned int pxa3xx_get_clk_frequency_khz(int info) | |||
98 | return CLK / 1000; | 98 | return CLK / 1000; |
99 | } | 99 | } |
100 | 100 | ||
101 | /* | ||
102 | * Return the current static memory controller clock frequency | ||
103 | * in units of 10kHz | ||
104 | */ | ||
105 | unsigned int pxa3xx_get_memclk_frequency_10khz(void) | ||
106 | { | ||
107 | unsigned long acsr; | ||
108 | unsigned int smcfs, clk = 0; | ||
109 | |||
110 | acsr = ACSR; | ||
111 | |||
112 | smcfs = (acsr >> 23) & 0x7; | ||
113 | clk = (acsr & ACCR_D0CS) ? RO_CLK : smcfs_mult[smcfs] * BASE_CLK; | ||
114 | |||
115 | return (clk / 10000); | ||
116 | } | ||
117 | |||
118 | void pxa3xx_clear_reset_status(unsigned int mask) | 101 | void pxa3xx_clear_reset_status(unsigned int mask) |
119 | { | 102 | { |
120 | /* RESET_STATUS_* has a 1:1 mapping with ARSR */ | 103 | /* RESET_STATUS_* has a 1:1 mapping with ARSR */ |
@@ -265,7 +248,7 @@ static struct clk_lookup pxa3xx_clkregs[] = { | |||
265 | INIT_CLKREG(&clk_pxa3xx_i2c, "pxa2xx-i2c.0", NULL), | 248 | INIT_CLKREG(&clk_pxa3xx_i2c, "pxa2xx-i2c.0", NULL), |
266 | INIT_CLKREG(&clk_pxa3xx_udc, "pxa27x-udc", NULL), | 249 | INIT_CLKREG(&clk_pxa3xx_udc, "pxa27x-udc", NULL), |
267 | INIT_CLKREG(&clk_pxa3xx_usbh, "pxa27x-ohci", NULL), | 250 | INIT_CLKREG(&clk_pxa3xx_usbh, "pxa27x-ohci", NULL), |
268 | INIT_CLKREG(&clk_pxa3xx_u2d, NULL, "U2DCLK"), | 251 | INIT_CLKREG(&clk_pxa3xx_u2d, "pxa3xx-u2d", NULL), |
269 | INIT_CLKREG(&clk_pxa3xx_keypad, "pxa27x-keypad", NULL), | 252 | INIT_CLKREG(&clk_pxa3xx_keypad, "pxa27x-keypad", NULL), |
270 | INIT_CLKREG(&clk_pxa3xx_ssp1, "pxa27x-ssp.0", NULL), | 253 | INIT_CLKREG(&clk_pxa3xx_ssp1, "pxa27x-ssp.0", NULL), |
271 | INIT_CLKREG(&clk_pxa3xx_ssp2, "pxa27x-ssp.1", NULL), | 254 | INIT_CLKREG(&clk_pxa3xx_ssp2, "pxa27x-ssp.1", NULL), |