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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-10-07 14:08:56 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-10-07 14:08:56 -0400
commit5a89770daad83df74d77a8d34a1ffaedae565ce9 (patch)
tree0d8ef70293a6ef969ba8b7718e59608337643d40 /arch/arm/mach-pxa/pxa27x.c
parentc46c948260f41af18b277c1eb1895d788d3605dc (diff)
parentaf7c951d76708c61b862463d579d76be757130bf (diff)
Merge branches 'pxa-core' and 'pxa-machines' into pxa-all
Conflicts: arch/arm/mach-pxa/Kconfig arch/arm/mach-pxa/pxa25x.c arch/arm/mach-pxa/pxa27x.c
Diffstat (limited to 'arch/arm/mach-pxa/pxa27x.c')
-rw-r--r--arch/arm/mach-pxa/pxa27x.c37
1 files changed, 6 insertions, 31 deletions
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 4835207c1426..bf01e14098f5 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -183,36 +183,18 @@ static struct clk pxa27x_clks[] = {
183 * More ones like CP and general purpose register values are preserved 183 * More ones like CP and general purpose register values are preserved
184 * with the stack pointer in sleep.S. 184 * with the stack pointer in sleep.S.
185 */ 185 */
186enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3, 186enum {
187
188 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
189 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
190 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
191 SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
192
193 SLEEP_SAVE_PSTR, 187 SLEEP_SAVE_PSTR,
194
195 SLEEP_SAVE_CKEN, 188 SLEEP_SAVE_CKEN,
196
197 SLEEP_SAVE_MDREFR, 189 SLEEP_SAVE_MDREFR,
198 SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER, 190 SLEEP_SAVE_PCFR,
199 SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
200
201 SLEEP_SAVE_COUNT 191 SLEEP_SAVE_COUNT
202}; 192};
203 193
204void pxa27x_cpu_pm_save(unsigned long *sleep_save) 194void pxa27x_cpu_pm_save(unsigned long *sleep_save)
205{ 195{
206 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(PGSR3);
207
208 SAVE(GAFR0_L); SAVE(GAFR0_U);
209 SAVE(GAFR1_L); SAVE(GAFR1_U);
210 SAVE(GAFR2_L); SAVE(GAFR2_U);
211 SAVE(GAFR3_L); SAVE(GAFR3_U);
212
213 SAVE(MDREFR); 196 SAVE(MDREFR);
214 SAVE(PWER); SAVE(PCFR); SAVE(PRER); 197 SAVE(PCFR);
215 SAVE(PFER); SAVE(PKWR);
216 198
217 SAVE(CKEN); 199 SAVE(CKEN);
218 SAVE(PSTR); 200 SAVE(PSTR);
@@ -220,21 +202,12 @@ void pxa27x_cpu_pm_save(unsigned long *sleep_save)
220 202
221void pxa27x_cpu_pm_restore(unsigned long *sleep_save) 203void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
222{ 204{
223 /* restore registers */
224 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
225 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
226 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
227 RESTORE(GAFR3_L); RESTORE(GAFR3_U);
228 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); RESTORE(PGSR3);
229
230 RESTORE(MDREFR); 205 RESTORE(MDREFR);
231 RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER); 206 RESTORE(PCFR);
232 RESTORE(PFER); RESTORE(PKWR);
233 207
234 PSSR = PSSR_RDH | PSSR_PH; 208 PSSR = PSSR_RDH | PSSR_PH;
235 209
236 RESTORE(CKEN); 210 RESTORE(CKEN);
237
238 RESTORE(PSTR); 211 RESTORE(PSTR);
239} 212}
240 213
@@ -386,6 +359,8 @@ static struct sys_device pxa27x_sysdev[] = {
386 { 359 {
387 .cls = &pxa_irq_sysclass, 360 .cls = &pxa_irq_sysclass,
388 }, { 361 }, {
362 .cls = &pxa2xx_mfp_sysclass,
363 }, {
389 .cls = &pxa_gpio_sysclass, 364 .cls = &pxa_gpio_sysclass,
390 }, 365 },
391}; 366};