diff options
author | Eric Miao <eric.y.miao@gmail.com> | 2007-07-18 06:38:45 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-07-20 12:25:10 -0400 |
commit | 711be5ccfe9a02ba560aa918a008c31ea4760163 (patch) | |
tree | b54cba04944a5ae0cb8a2d8ecd4d8efd14f2e495 /arch/arm/mach-pxa/pxa25x.c | |
parent | e09d02e123fb6944af23a0697369ebcfc15acf73 (diff) |
[ARM] 4488/1: pxa: move pxa25x/pxa27x specific code out of pm.c
1. introduce a structure pxa_cpu_pm_fns for pxa25x/pxa27x specific
operations as follows:
struct pxa_cpu_pm_fns {
int save_size;
void (*save)(unsigned long *);
void (*restore)(unsigned long *);
int (*valid)(suspend_state_t state);
void (*enter)(suspend_state_t state);
}
2. processor specific registers saving and restoring are performed
by calling the corresponding (*save) and (*restore)
3. pxa_cpu_pm_fns->save_size should be initialized to the required
size for processor specific registers saving, the allocated
memory address will be passed to (*save) and (*restore)
memory allocation happens early in pxa_pm_init(), and save_size
should be assigned prior to this (which is usually true, since
pxa_pm_init() happens in device_initcall()
4. there're some redundancies for those SLEEP_SAVE_XXX and related
macros, will be fixed later, one way possible is for the system
devices to handle the specific registers saving and restoring
Signed-off-by: eric miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa/pxa25x.c')
-rw-r--r-- | arch/arm/mach-pxa/pxa25x.c | 84 |
1 files changed, 80 insertions, 4 deletions
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 9d9422e2f75c..1ec4bf1ff249 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
@@ -110,7 +110,75 @@ EXPORT_SYMBOL(get_lcdclk_frequency_10khz); | |||
110 | 110 | ||
111 | #ifdef CONFIG_PM | 111 | #ifdef CONFIG_PM |
112 | 112 | ||
113 | void pxa_cpu_pm_enter(suspend_state_t state) | 113 | #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x |
114 | #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] | ||
115 | |||
116 | #define RESTORE_GPLEVEL(n) do { \ | ||
117 | GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \ | ||
118 | GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \ | ||
119 | } while (0) | ||
120 | |||
121 | /* | ||
122 | * List of global PXA peripheral registers to preserve. | ||
123 | * More ones like CP and general purpose register values are preserved | ||
124 | * with the stack pointer in sleep.S. | ||
125 | */ | ||
126 | enum { SLEEP_SAVE_START = 0, | ||
127 | |||
128 | SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2, | ||
129 | SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2, | ||
130 | SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2, | ||
131 | SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2, | ||
132 | SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, | ||
133 | |||
134 | SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, | ||
135 | SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, | ||
136 | SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U, | ||
137 | |||
138 | SLEEP_SAVE_PSTR, | ||
139 | |||
140 | SLEEP_SAVE_ICMR, | ||
141 | SLEEP_SAVE_CKEN, | ||
142 | |||
143 | SLEEP_SAVE_SIZE | ||
144 | }; | ||
145 | |||
146 | |||
147 | static void pxa25x_cpu_pm_save(unsigned long *sleep_save) | ||
148 | { | ||
149 | SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2); | ||
150 | SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2); | ||
151 | SAVE(GRER0); SAVE(GRER1); SAVE(GRER2); | ||
152 | SAVE(GFER0); SAVE(GFER1); SAVE(GFER2); | ||
153 | SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); | ||
154 | |||
155 | SAVE(GAFR0_L); SAVE(GAFR0_U); | ||
156 | SAVE(GAFR1_L); SAVE(GAFR1_U); | ||
157 | SAVE(GAFR2_L); SAVE(GAFR2_U); | ||
158 | |||
159 | SAVE(ICMR); | ||
160 | SAVE(CKEN); | ||
161 | SAVE(PSTR); | ||
162 | } | ||
163 | |||
164 | static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) | ||
165 | { | ||
166 | /* restore registers */ | ||
167 | RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2); | ||
168 | RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2); | ||
169 | RESTORE(GAFR0_L); RESTORE(GAFR0_U); | ||
170 | RESTORE(GAFR1_L); RESTORE(GAFR1_U); | ||
171 | RESTORE(GAFR2_L); RESTORE(GAFR2_U); | ||
172 | RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2); | ||
173 | RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2); | ||
174 | RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); | ||
175 | |||
176 | RESTORE(CKEN); | ||
177 | RESTORE(ICMR); | ||
178 | RESTORE(PSTR); | ||
179 | } | ||
180 | |||
181 | static void pxa25x_cpu_pm_enter(suspend_state_t state) | ||
114 | { | 182 | { |
115 | extern void pxa_cpu_suspend(unsigned int); | 183 | extern void pxa_cpu_suspend(unsigned int); |
116 | extern void pxa_cpu_resume(void); | 184 | extern void pxa_cpu_resume(void); |
@@ -126,10 +194,18 @@ void pxa_cpu_pm_enter(suspend_state_t state) | |||
126 | } | 194 | } |
127 | } | 195 | } |
128 | 196 | ||
129 | static struct pm_ops pxa25x_pm_ops = { | 197 | static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = { |
130 | .enter = pxa_pm_enter, | 198 | .save_size = SLEEP_SAVE_SIZE, |
131 | .valid = pm_valid_only_mem, | 199 | .valid = pm_valid_only_mem, |
200 | .save = pxa25x_cpu_pm_save, | ||
201 | .restore = pxa25x_cpu_pm_restore, | ||
202 | .enter = pxa25x_cpu_pm_enter, | ||
132 | }; | 203 | }; |
204 | |||
205 | static void __init pxa25x_init_pm(void) | ||
206 | { | ||
207 | pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns; | ||
208 | } | ||
133 | #endif | 209 | #endif |
134 | 210 | ||
135 | void __init pxa25x_init_irq(void) | 211 | void __init pxa25x_init_irq(void) |
@@ -159,7 +235,7 @@ static int __init pxa25x_init(void) | |||
159 | if ((ret = pxa_init_dma(16))) | 235 | if ((ret = pxa_init_dma(16))) |
160 | return ret; | 236 | return ret; |
161 | #ifdef CONFIG_PM | 237 | #ifdef CONFIG_PM |
162 | pm_set_ops(&pxa25x_pm_ops); | 238 | pxa25x_init_pm(); |
163 | #endif | 239 | #endif |
164 | ret = platform_add_devices(pxa25x_devices, | 240 | ret = platform_add_devices(pxa25x_devices, |
165 | ARRAY_SIZE(pxa25x_devices)); | 241 | ARRAY_SIZE(pxa25x_devices)); |