diff options
author | Eric Miao <eric.miao@marvell.com> | 2008-09-03 06:06:34 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-09-26 18:43:20 -0400 |
commit | 5a3d96519040f9736b9f8089e2a1e33a81a6eafe (patch) | |
tree | be92df6b14ba6c9e420bc45d13a76b812991bb0c /arch/arm/mach-pxa/pxa25x.c | |
parent | 4fa7c24e94b3f5bfb367bb847af3c3abd8cca3c0 (diff) |
[ARM] pxa: better MFP low power state support for pxa25x/pxa27x
When configured as a specific low power state: MFP_LPM_DRIVE_LOW,
MFP_LPM_DRIVE_HIGH, the corresponding GPDR register bit during
low power mode shall be re-configured as output (if they are not
configured so), thus the PGSRx bits can output.
Create an additional low power values GPDR registers, and properly
save/restore the GAFR + GPDR registers when doing suspend/resume.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa/pxa25x.c')
-rw-r--r-- | arch/arm/mach-pxa/pxa25x.c | 28 |
1 files changed, 3 insertions, 25 deletions
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 305452b56e91..f0eda2094494 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
@@ -203,33 +203,17 @@ static struct clk pxa25x_clks[] = { | |||
203 | * More ones like CP and general purpose register values are preserved | 203 | * More ones like CP and general purpose register values are preserved |
204 | * with the stack pointer in sleep.S. | 204 | * with the stack pointer in sleep.S. |
205 | */ | 205 | */ |
206 | enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, | 206 | enum { |
207 | |||
208 | SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, | ||
209 | SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, | ||
210 | SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U, | ||
211 | |||
212 | SLEEP_SAVE_PSTR, | 207 | SLEEP_SAVE_PSTR, |
213 | |||
214 | SLEEP_SAVE_CKEN, | 208 | SLEEP_SAVE_CKEN, |
215 | |||
216 | SLEEP_SAVE_COUNT | 209 | SLEEP_SAVE_COUNT |
217 | }; | 210 | }; |
218 | 211 | ||
219 | 212 | ||
220 | static void pxa25x_cpu_pm_save(unsigned long *sleep_save) | 213 | static void pxa25x_cpu_pm_save(unsigned long *sleep_save) |
221 | { | 214 | { |
222 | SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); | ||
223 | |||
224 | SAVE(GAFR0_L); SAVE(GAFR0_U); | ||
225 | SAVE(GAFR1_L); SAVE(GAFR1_U); | ||
226 | SAVE(GAFR2_L); SAVE(GAFR2_U); | ||
227 | |||
228 | SAVE(CKEN); | 215 | SAVE(CKEN); |
229 | SAVE(PSTR); | 216 | SAVE(PSTR); |
230 | |||
231 | /* Clear GPIO transition detect bits */ | ||
232 | GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2; | ||
233 | } | 217 | } |
234 | 218 | ||
235 | static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) | 219 | static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) |
@@ -237,14 +221,6 @@ static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) | |||
237 | /* ensure not to come back here if it wasn't intended */ | 221 | /* ensure not to come back here if it wasn't intended */ |
238 | PSPR = 0; | 222 | PSPR = 0; |
239 | 223 | ||
240 | /* restore registers */ | ||
241 | RESTORE(GAFR0_L); RESTORE(GAFR0_U); | ||
242 | RESTORE(GAFR1_L); RESTORE(GAFR1_U); | ||
243 | RESTORE(GAFR2_L); RESTORE(GAFR2_U); | ||
244 | RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); | ||
245 | |||
246 | PSSR = PSSR_RDH | PSSR_PH; | ||
247 | |||
248 | RESTORE(CKEN); | 224 | RESTORE(CKEN); |
249 | RESTORE(PSTR); | 225 | RESTORE(PSTR); |
250 | } | 226 | } |
@@ -330,6 +306,8 @@ static struct sys_device pxa25x_sysdev[] = { | |||
330 | { | 306 | { |
331 | .cls = &pxa_irq_sysclass, | 307 | .cls = &pxa_irq_sysclass, |
332 | }, { | 308 | }, { |
309 | .cls = &pxa2xx_mfp_sysclass, | ||
310 | }, { | ||
333 | .cls = &pxa_gpio_sysclass, | 311 | .cls = &pxa_gpio_sysclass, |
334 | }, | 312 | }, |
335 | }; | 313 | }; |