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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-01 21:46:13 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-01 21:46:13 -0400
commit8f446a7a069e0af0639385f67c78ee2279bca04c (patch)
tree580cf495616b36ca0af0826afa87c430cdc1e7cb /arch/arm/mach-pxa/mainstone.c
parent84be4ae2c038e2b03d650cbf2a7cfd9e8d6e9e51 (diff)
parent04ef037c926ddb31088c976538e29eada4fd1490 (diff)
Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc driver specific changes from Olof Johansson: - A long-coming conversion of various platforms to a common LED infrastructure - AT91 is moved over to use the newer MCI driver for MMC - Pincontrol conversions for samsung platforms - DT bindings for gscaler on samsung - i2c driver fixes for tegra, acked by i2c maintainer Fix up conflicts as per Olof. * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits) drivers: bus: omap_l3: use resources instead of hardcoded irqs pinctrl: exynos: Fix wakeup IRQ domain registration check pinctrl: samsung: Uninline samsung_pinctrl_get_soc_data pinctrl: exynos: Correct the detection of wakeup-eint node pinctrl: exynos: Mark exynos_irq_demux_eint as inline pinctrl: exynos: Handle only unmasked wakeup interrupts pinctrl: exynos: Fix typos in gpio/wkup _irq_mask pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa drivers: bus: Move the OMAP interconnect driver to drivers/bus/ i2c: tegra: dynamically control fast clk i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20 ARM: tegra: clock: remove unused clock entry for i2c ARM: tegra: clock: add connection name in i2c clock entry i2c: tegra: pass proper name for getting clock ARM: tegra: clock: add i2c fast clock entry in clock table ARM: EXYNOS: Adds G-Scaler device from Device Tree ARM: EXYNOS: Add clock support for G-Scaler ARM: EXYNOS: Enable pinctrl driver support for EXYNOS4 device tree enabled platform ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used ...
Diffstat (limited to 'arch/arm/mach-pxa/mainstone.c')
-rw-r--r--arch/arm/mach-pxa/mainstone.c94
1 files changed, 94 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 1aebaf719462..bdc6c335830a 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -28,6 +28,8 @@
28#include <linux/pwm_backlight.h> 28#include <linux/pwm_backlight.h>
29#include <linux/smc91x.h> 29#include <linux/smc91x.h>
30#include <linux/i2c/pxa-i2c.h> 30#include <linux/i2c/pxa-i2c.h>
31#include <linux/slab.h>
32#include <linux/leds.h>
31 33
32#include <asm/types.h> 34#include <asm/types.h>
33#include <asm/setup.h> 35#include <asm/setup.h>
@@ -613,6 +615,98 @@ static void __init mainstone_map_io(void)
613 PCFR = 0x66; 615 PCFR = 0x66;
614} 616}
615 617
618/*
619 * Driver for the 8 discrete LEDs available for general use:
620 * Note: bits [15-8] are used to enable/blank the 8 7 segment hex displays
621 * so be sure to not monkey with them here.
622 */
623
624#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
625struct mainstone_led {
626 struct led_classdev cdev;
627 u8 mask;
628};
629
630/*
631 * The triggers lines up below will only be used if the
632 * LED triggers are compiled in.
633 */
634static const struct {
635 const char *name;
636 const char *trigger;
637} mainstone_leds[] = {
638 { "mainstone:D28", "default-on", },
639 { "mainstone:D27", "cpu0", },
640 { "mainstone:D26", "heartbeat" },
641 { "mainstone:D25", },
642 { "mainstone:D24", },
643 { "mainstone:D23", },
644 { "mainstone:D22", },
645 { "mainstone:D21", },
646};
647
648static void mainstone_led_set(struct led_classdev *cdev,
649 enum led_brightness b)
650{
651 struct mainstone_led *led = container_of(cdev,
652 struct mainstone_led, cdev);
653 u32 reg = MST_LEDCTRL;
654
655 if (b != LED_OFF)
656 reg |= led->mask;
657 else
658 reg &= ~led->mask;
659
660 MST_LEDCTRL = reg;
661}
662
663static enum led_brightness mainstone_led_get(struct led_classdev *cdev)
664{
665 struct mainstone_led *led = container_of(cdev,
666 struct mainstone_led, cdev);
667 u32 reg = MST_LEDCTRL;
668
669 return (reg & led->mask) ? LED_FULL : LED_OFF;
670}
671
672static int __init mainstone_leds_init(void)
673{
674 int i;
675
676 if (!machine_is_mainstone())
677 return -ENODEV;
678
679 /* All ON */
680 MST_LEDCTRL |= 0xff;
681 for (i = 0; i < ARRAY_SIZE(mainstone_leds); i++) {
682 struct mainstone_led *led;
683
684 led = kzalloc(sizeof(*led), GFP_KERNEL);
685 if (!led)
686 break;
687
688 led->cdev.name = mainstone_leds[i].name;
689 led->cdev.brightness_set = mainstone_led_set;
690 led->cdev.brightness_get = mainstone_led_get;
691 led->cdev.default_trigger = mainstone_leds[i].trigger;
692 led->mask = BIT(i);
693
694 if (led_classdev_register(NULL, &led->cdev) < 0) {
695 kfree(led);
696 break;
697 }
698 }
699
700 return 0;
701}
702
703/*
704 * Since we may have triggers on any subsystem, defer registration
705 * until after subsystem_init.
706 */
707fs_initcall(mainstone_leds_init);
708#endif
709
616MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") 710MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
617 /* Maintainer: MontaVista Software Inc. */ 711 /* Maintainer: MontaVista Software Inc. */
618 .atag_offset = 0x100, /* BLOB boot parameter setting */ 712 .atag_offset = 0x100, /* BLOB boot parameter setting */