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authorEric Miao <eric.miao@marvell.com>2008-08-31 18:56:07 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-09-23 17:04:38 -0400
commit24ff4cdde79a88720c3eadda3b565f2e4ea07fd2 (patch)
tree35a563cae6d0c573285cfbcf88d529ae9252aeb4 /arch/arm/mach-pxa/littleton.c
parent68677ab3d08ed6d57be0c1ae4e4d364bb2d104b6 (diff)
[ARM] pxa/littleton: add support for SPI-based TDO24M LCD panel driver
Signed-off-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa/littleton.c')
-rw-r--r--arch/arm/mach-pxa/littleton.c205
1 files changed, 49 insertions, 156 deletions
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 58f3402a0375..b4d00aba0e31 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -20,6 +20,7 @@
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/spi/spi.h>
23#include <linux/smc91x.h> 24#include <linux/smc91x.h>
24 25
25#include <asm/types.h> 26#include <asm/types.h>
@@ -38,6 +39,7 @@
38#include <mach/gpio.h> 39#include <mach/gpio.h>
39#include <mach/pxafb.h> 40#include <mach/pxafb.h>
40#include <mach/ssp.h> 41#include <mach/ssp.h>
42#include <mach/pxa2xx_spi.h>
41#include <mach/pxa27x_keypad.h> 43#include <mach/pxa27x_keypad.h>
42#include <mach/pxa3xx_nand.h> 44#include <mach/pxa3xx_nand.h>
43#include <mach/littleton.h> 45#include <mach/littleton.h>
@@ -72,8 +74,8 @@ static mfp_cfg_t littleton_mfp_cfg[] __initdata = {
72 74
73 /* SSP2 */ 75 /* SSP2 */
74 GPIO25_SSP2_SCLK, 76 GPIO25_SSP2_SCLK,
75 GPIO17_SSP2_FRM,
76 GPIO27_SSP2_TXD, 77 GPIO27_SSP2_TXD,
78 GPIO17_GPIO, /* SFRM as chip-select */
77 79
78 /* Debug Ethernet */ 80 /* Debug Ethernet */
79 GPIO90_GPIO, 81 GPIO90_GPIO,
@@ -123,160 +125,6 @@ static struct platform_device smc91x_device = {
123}; 125};
124 126
125#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 127#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
126/* use bit 30, 31 as the indicator of command parameter number */
127#define CMD0(x) ((0x00000000) | ((x) << 9))
128#define CMD1(x, x1) ((0x40000000) | ((x) << 9) | 0x100 | (x1))
129#define CMD2(x, x1, x2) ((0x80000000) | ((x) << 18) | 0x20000 |\
130 ((x1) << 9) | 0x100 | (x2))
131
132static uint32_t lcd_panel_reset[] = {
133 CMD0(0x1), /* reset */
134 CMD0(0x0), /* nop */
135 CMD0(0x0), /* nop */
136 CMD0(0x0), /* nop */
137};
138
139static uint32_t lcd_panel_on[] = {
140 CMD0(0x29), /* Display ON */
141 CMD2(0xB8, 0xFF, 0xF9), /* Output Control */
142 CMD0(0x11), /* Sleep out */
143 CMD1(0xB0, 0x16), /* Wake */
144};
145
146static uint32_t lcd_panel_off[] = {
147 CMD0(0x28), /* Display OFF */
148 CMD2(0xB8, 0x80, 0x02), /* Output Control */
149 CMD0(0x10), /* Sleep in */
150 CMD1(0xB0, 0x00), /* Deep stand by in */
151};
152
153static uint32_t lcd_vga_pass_through[] = {
154 CMD1(0xB0, 0x16),
155 CMD1(0xBC, 0x80),
156 CMD1(0xE1, 0x00),
157 CMD1(0x36, 0x50),
158 CMD1(0x3B, 0x00),
159};
160
161static uint32_t lcd_qvga_pass_through[] = {
162 CMD1(0xB0, 0x16),
163 CMD1(0xBC, 0x81),
164 CMD1(0xE1, 0x00),
165 CMD1(0x36, 0x50),
166 CMD1(0x3B, 0x22),
167};
168
169static uint32_t lcd_vga_transfer[] = {
170 CMD1(0xcf, 0x02), /* Blanking period control (1) */
171 CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
172 CMD1(0xd1, 0x01), /* CKV timing control on/off */
173 CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */
174 CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */
175 CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */
176 CMD1(0xd5, 0x14), /* ASW timing control (2) */
177 CMD0(0x21), /* Invert for normally black display */
178 CMD0(0x29), /* Display on */
179};
180
181static uint32_t lcd_qvga_transfer[] = {
182 CMD1(0xd6, 0x02), /* Blanking period control (1) */
183 CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */
184 CMD1(0xd8, 0x01), /* CKV timing control on/off */
185 CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */
186 CMD2(0xde, 0x05, 0x0a), /* OEV timing control */
187 CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */
188 CMD1(0xe0, 0x0a), /* ASW timing control (2) */
189 CMD0(0x21), /* Invert for normally black display */
190 CMD0(0x29), /* Display on */
191};
192
193static uint32_t lcd_panel_config[] = {
194 CMD2(0xb8, 0xff, 0xf9), /* Output control */
195 CMD0(0x11), /* sleep out */
196 CMD1(0xba, 0x01), /* Display mode (1) */
197 CMD1(0xbb, 0x00), /* Display mode (2) */
198 CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */
199 CMD1(0xbf, 0x10), /* Drive system change control */
200 CMD1(0xb1, 0x56), /* Booster operation setup */
201 CMD1(0xb2, 0x33), /* Booster mode setup */
202 CMD1(0xb3, 0x11), /* Booster frequency setup */
203 CMD1(0xb4, 0x02), /* Op amp/system clock */
204 CMD1(0xb5, 0x35), /* VCS voltage */
205 CMD1(0xb6, 0x40), /* VCOM voltage */
206 CMD1(0xb7, 0x03), /* External display signal */
207 CMD1(0xbd, 0x00), /* ASW slew rate */
208 CMD1(0xbe, 0x00), /* Dummy data for QuadData operation */
209 CMD1(0xc0, 0x11), /* Sleep out FR count (A) */
210 CMD1(0xc1, 0x11), /* Sleep out FR count (B) */
211 CMD1(0xc2, 0x11), /* Sleep out FR count (C) */
212 CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */
213 CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */
214 CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */
215 CMD1(0xc6, 0xc0), /* Sleep out FR count (G) */
216 CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */
217 CMD1(0xc8, 0x44), /* Gamma 1 fine tuning (2) */
218 CMD1(0xc9, 0x33), /* Gamma 1 inclination adjustment */
219 CMD1(0xca, 0x00), /* Gamma 1 blue offset adjustment */
220 CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */
221};
222
223static void ssp_reconfig(struct ssp_dev *dev, int nparam)
224{
225 static int last_nparam = -1;
226
227 /* check if it is necessary to re-config SSP */
228 if (nparam == last_nparam)
229 return;
230
231 ssp_disable(dev);
232 ssp_config(dev, (nparam == 2) ? 0x0010058a : 0x00100581, 0x18, 0, 0);
233
234 last_nparam = nparam;
235}
236
237static void ssp_send_cmd(uint32_t *cmd, int num)
238{
239 static int ssp_initialized;
240 static struct ssp_dev ssp2;
241
242 int i;
243
244 if (!ssp_initialized) {
245 ssp_init(&ssp2, 2, SSP_NO_IRQ);
246 ssp_initialized = 1;
247 }
248
249 clk_enable(ssp2.ssp->clk);
250 for (i = 0; i < num; i++, cmd++) {
251 ssp_reconfig(&ssp2, (*cmd >> 30) & 0x3);
252 ssp_write_word(&ssp2, *cmd & 0x3fffffff);
253
254 /* FIXME: ssp_flush() is mandatory here to work */
255 ssp_flush(&ssp2);
256 }
257 clk_disable(ssp2.ssp->clk);
258}
259
260static void littleton_lcd_power(int on, struct fb_var_screeninfo *var)
261{
262 if (on) {
263 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_on));
264 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_reset));
265 if (var->xres > 240) {
266 /* VGA */
267 ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_pass_through));
268 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config));
269 ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_transfer));
270 } else {
271 /* QVGA */
272 ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_pass_through));
273 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config));
274 ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_transfer));
275 }
276 } else
277 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_off));
278}
279
280static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = { 128static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = {
281 [0] = { 129 [0] = {
282 /* VGA */ 130 /* VGA */
@@ -312,7 +160,6 @@ static struct pxafb_mach_info littleton_lcd_info = {
312 .modes = tpo_tdo24mtea1_modes, 160 .modes = tpo_tdo24mtea1_modes,
313 .num_modes = 2, 161 .num_modes = 2,
314 .lcd_conn = LCD_COLOR_TFT_16BPP, 162 .lcd_conn = LCD_COLOR_TFT_16BPP,
315 .pxafb_lcd_power = littleton_lcd_power,
316}; 163};
317 164
318static void littleton_init_lcd(void) 165static void littleton_init_lcd(void)
@@ -323,6 +170,51 @@ static void littleton_init_lcd(void)
323static inline void littleton_init_lcd(void) {}; 170static inline void littleton_init_lcd(void) {};
324#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */ 171#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */
325 172
173#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
174static struct pxa2xx_spi_master littleton_spi_info = {
175 .num_chipselect = 1,
176};
177
178static void littleton_tdo24m_cs(u32 cmd)
179{
180 gpio_set_value(LITTLETON_GPIO_LCD_CS, !(cmd == PXA2XX_CS_ASSERT));
181}
182
183static struct pxa2xx_spi_chip littleton_tdo24m_chip = {
184 .rx_threshold = 1,
185 .tx_threshold = 1,
186 .cs_control = littleton_tdo24m_cs,
187};
188
189static struct spi_board_info littleton_spi_devices[] __initdata = {
190 {
191 .modalias = "tdo24m",
192 .max_speed_hz = 1000000,
193 .bus_num = 2,
194 .chip_select = 0,
195 .controller_data= &littleton_tdo24m_chip,
196 },
197};
198
199static void __init littleton_init_spi(void)
200{
201 int err;
202
203 err = gpio_request(LITTLETON_GPIO_LCD_CS, "LCD_CS");
204 if (err) {
205 pr_warning("failed to request GPIO for LCS CS\n");
206 return;
207 }
208
209 gpio_direction_output(LITTLETON_GPIO_LCD_CS, 1);
210
211 pxa2xx_set_spi_info(2, &littleton_spi_info);
212 spi_register_board_info(ARRAY_AND_SIZE(littleton_spi_devices));
213}
214#else
215static inline void littleton_init_spi(void) {}
216#endif
217
326#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) 218#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
327static unsigned int littleton_matrix_key_map[] = { 219static unsigned int littleton_matrix_key_map[] = {
328 /* KEY(row, col, key_code) */ 220 /* KEY(row, col, key_code) */
@@ -433,6 +325,7 @@ static void __init littleton_init(void)
433 */ 325 */
434 platform_device_register(&smc91x_device); 326 platform_device_register(&smc91x_device);
435 327
328 littleton_init_spi();
436 littleton_init_lcd(); 329 littleton_init_lcd();
437 littleton_init_keypad(); 330 littleton_init_keypad();
438 littleton_init_nand(); 331 littleton_init_nand();