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authorEric Miao <eric.y.miao@gmail.com>2011-01-12 17:42:24 -0500
committerEric Miao <eric.y.miao@gmail.com>2011-01-15 05:29:15 -0500
commita1015a159530391fc498482656bab6c99dcd3c70 (patch)
tree96e55285174663c7486b8b1c92fe241b7d03878a /arch/arm/mach-pxa/irq.c
parent1b624fb64c2de44c00576cc9695680983f05c1ce (diff)
ARM: pxa: fix recursive calls in pxa_low_gpio_chip
Signed-off-by: Eric Miao <eric.y.miao@gmail.com> Tested-by: Marek Vasut <marek.vasut@gmail.com>
Diffstat (limited to 'arch/arm/mach-pxa/irq.c')
-rw-r--r--arch/arm/mach-pxa/irq.c41
1 files changed, 14 insertions, 27 deletions
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index b71677bce548..2693e3c3776f 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -53,6 +53,17 @@ static inline int cpu_has_ipr(void)
53 return !cpu_is_pxa25x(); 53 return !cpu_is_pxa25x();
54} 54}
55 55
56static inline void __iomem *irq_base(int i)
57{
58 static unsigned long phys_base[] = {
59 0x40d00000,
60 0x40d0009c,
61 0x40d00130,
62 };
63
64 return (void __iomem *)io_p2v(phys_base[i]);
65}
66
56static void pxa_mask_irq(struct irq_data *d) 67static void pxa_mask_irq(struct irq_data *d)
57{ 68{
58 void __iomem *base = irq_data_get_irq_chip_data(d); 69 void __iomem *base = irq_data_get_irq_chip_data(d);
@@ -108,25 +119,11 @@ static void pxa_ack_low_gpio(struct irq_data *d)
108 GEDR0 = (1 << (d->irq - IRQ_GPIO0)); 119 GEDR0 = (1 << (d->irq - IRQ_GPIO0));
109} 120}
110 121
111static void pxa_mask_low_gpio(struct irq_data *d)
112{
113 struct irq_desc *desc = irq_to_desc(d->irq);
114
115 desc->irq_data.chip->irq_mask(d);
116}
117
118static void pxa_unmask_low_gpio(struct irq_data *d)
119{
120 struct irq_desc *desc = irq_to_desc(d->irq);
121
122 desc->irq_data.chip->irq_unmask(d);
123}
124
125static struct irq_chip pxa_low_gpio_chip = { 122static struct irq_chip pxa_low_gpio_chip = {
126 .name = "GPIO-l", 123 .name = "GPIO-l",
127 .irq_ack = pxa_ack_low_gpio, 124 .irq_ack = pxa_ack_low_gpio,
128 .irq_mask = pxa_mask_low_gpio, 125 .irq_mask = pxa_mask_irq,
129 .irq_unmask = pxa_unmask_low_gpio, 126 .irq_unmask = pxa_unmask_irq,
130 .irq_set_type = pxa_set_low_gpio_type, 127 .irq_set_type = pxa_set_low_gpio_type,
131}; 128};
132 129
@@ -141,6 +138,7 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
141 138
142 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { 139 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
143 set_irq_chip(irq, &pxa_low_gpio_chip); 140 set_irq_chip(irq, &pxa_low_gpio_chip);
141 set_irq_chip_data(irq, irq_base(0));
144 set_irq_handler(irq, handle_edge_irq); 142 set_irq_handler(irq, handle_edge_irq);
145 set_irq_flags(irq, IRQF_VALID); 143 set_irq_flags(irq, IRQF_VALID);
146 } 144 }
@@ -148,17 +146,6 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
148 pxa_low_gpio_chip.irq_set_wake = fn; 146 pxa_low_gpio_chip.irq_set_wake = fn;
149} 147}
150 148
151static inline void __iomem *irq_base(int i)
152{
153 static unsigned long phys_base[] = {
154 0x40d00000,
155 0x40d0009c,
156 0x40d00130,
157 };
158
159 return (void __iomem *)io_p2v(phys_base[i]);
160}
161
162void __init pxa_init_irq(int irq_nr, set_wake_t fn) 149void __init pxa_init_irq(int irq_nr, set_wake_t fn)
163{ 150{
164 int irq, i, n; 151 int irq, i, n;