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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-11-23 06:41:32 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-11-30 07:24:47 -0500
commit10dd5ce28d78e2440e8fa1135d17e33399d75340 (patch)
treed2e76765a57e7e47a9c424f99c3a22bf99c6da64 /arch/arm/mach-pxa/irq.c
parent127e477e0cd8da4d3058709ab2dc7b92dccbcba5 (diff)
[ARM] Remove compatibility layer for ARM irqs
set_irq_chipdata -> set_irq_chip_data get_irq_chipdata -> get_irq_chip_data do_level_IRQ -> handle_level_irq do_edge_IRQ -> handle_edge_irq do_simple_IRQ -> handle_simple_irq irqdesc -> irq_desc irqchip -> irq_chip Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa/irq.c')
-rw-r--r--arch/arm/mach-pxa/irq.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index ab1a16025d51..f815678a9d63 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -143,7 +143,7 @@ static struct irq_chip pxa_low_gpio_chip = {
143 * Demux handler for GPIO>=2 edge detect interrupts 143 * Demux handler for GPIO>=2 edge detect interrupts
144 */ 144 */
145 145
146static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc) 146static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
147{ 147{
148 unsigned int mask; 148 unsigned int mask;
149 int loop; 149 int loop;
@@ -286,27 +286,27 @@ void __init pxa_init_irq(void)
286 286
287 for (irq = PXA_IRQ(PXA_IRQ_SKIP); irq <= PXA_IRQ(31); irq++) { 287 for (irq = PXA_IRQ(PXA_IRQ_SKIP); irq <= PXA_IRQ(31); irq++) {
288 set_irq_chip(irq, &pxa_internal_chip_low); 288 set_irq_chip(irq, &pxa_internal_chip_low);
289 set_irq_handler(irq, do_level_IRQ); 289 set_irq_handler(irq, handle_level_irq);
290 set_irq_flags(irq, IRQF_VALID); 290 set_irq_flags(irq, IRQF_VALID);
291 } 291 }
292 292
293#if PXA_INTERNAL_IRQS > 32 293#if PXA_INTERNAL_IRQS > 32
294 for (irq = PXA_IRQ(32); irq < PXA_IRQ(PXA_INTERNAL_IRQS); irq++) { 294 for (irq = PXA_IRQ(32); irq < PXA_IRQ(PXA_INTERNAL_IRQS); irq++) {
295 set_irq_chip(irq, &pxa_internal_chip_high); 295 set_irq_chip(irq, &pxa_internal_chip_high);
296 set_irq_handler(irq, do_level_IRQ); 296 set_irq_handler(irq, handle_level_irq);
297 set_irq_flags(irq, IRQF_VALID); 297 set_irq_flags(irq, IRQF_VALID);
298 } 298 }
299#endif 299#endif
300 300
301 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { 301 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
302 set_irq_chip(irq, &pxa_low_gpio_chip); 302 set_irq_chip(irq, &pxa_low_gpio_chip);
303 set_irq_handler(irq, do_edge_IRQ); 303 set_irq_handler(irq, handle_edge_irq);
304 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 304 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
305 } 305 }
306 306
307 for (irq = IRQ_GPIO(2); irq <= IRQ_GPIO(PXA_LAST_GPIO); irq++) { 307 for (irq = IRQ_GPIO(2); irq <= IRQ_GPIO(PXA_LAST_GPIO); irq++) {
308 set_irq_chip(irq, &pxa_muxed_gpio_chip); 308 set_irq_chip(irq, &pxa_muxed_gpio_chip);
309 set_irq_handler(irq, do_edge_IRQ); 309 set_irq_handler(irq, handle_edge_irq);
310 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 310 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
311 } 311 }
312 312