ARM: pxa: use chained interrupt for GPIO0 and GPIO1

GPIO0 and GPIO1 are linked to unique interrupt line in PXA series,
others are linked to another interrupt line. All GPIO are linked to one
interrupt line in MMP series.

Since gpio driver is shared between PXA series and MMP series, define
GPIO0 and GPIO1 as chained interrupt chip. So we can move out gpio code
from irq.c to gpio-pxa.c.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>

1 files changed, 0 insertions, 58 deletions

diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 532c5d3a97d2..36c538f48fa6 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -92,44 +92,6 @@ static struct irq_chip pxa_internal_irq_chip = {
         .irq_unmask     = pxa_unmask_irq,
 };
 
-/*
- * GPIO IRQs for GPIO 0 and 1
- */
-static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type)
-{
-        int gpio = d->irq - IRQ_GPIO0;
-
-        if (__gpio_is_occupied(gpio)) {
-                pr_err("%s failed: GPIO is configured\n", __func__);
-                return -EINVAL;
-        }
-
-        if (type & IRQ_TYPE_EDGE_RISING)
-                GRER0 |= GPIO_bit(gpio);
-        else
-                GRER0 &= ~GPIO_bit(gpio);
-
-        if (type & IRQ_TYPE_EDGE_FALLING)
-                GFER0 |= GPIO_bit(gpio);
-        else
-                GFER0 &= ~GPIO_bit(gpio);
-
-        return 0;
-}
-
-static void pxa_ack_low_gpio(struct irq_data *d)
-{
-        GEDR0 = (1 << (d->irq - IRQ_GPIO0));
-}
-
-static struct irq_chip pxa_low_gpio_chip = {
-        .name           = "GPIO-l",
-        .irq_ack        = pxa_ack_low_gpio,
-        .irq_mask       = pxa_mask_irq,
-        .irq_unmask     = pxa_unmask_irq,
-        .irq_set_type   = pxa_set_low_gpio_type,
-};
-
 asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs)
 {
         uint32_t icip, icmr, mask;
@@ -160,25 +122,6 @@ asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs)
         } while (1);
 }
 
-static void __init pxa_init_low_gpio_irq(set_wake_t fn)
-{
-        int irq;
-
-        /* clear edge detection on GPIO 0 and 1 */
-        GFER0 &= ~0x3;
-        GRER0 &= ~0x3;
-        GEDR0 = 0x3;
-
-        for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
-                irq_set_chip_and_handler(irq, &pxa_low_gpio_chip,
-                                         handle_edge_irq);
-                irq_set_chip_data(irq, irq_base(0));
-                set_irq_flags(irq, IRQF_VALID);
-        }
-
-        pxa_low_gpio_chip.irq_set_wake = fn;
-}
-
 void __init pxa_init_irq(int irq_nr, set_wake_t fn)
 {
         int irq, i, n;
@@ -209,7 +152,6 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
         __raw_writel(1, irq_base(0) + ICCR);
 
         pxa_internal_irq_chip.irq_set_wake = fn;
-        pxa_init_low_gpio_irq(fn);
 }
 
 #ifdef CONFIG_PM