diff options
author | Haojian Zhuang <haojian.zhuang@marvell.com> | 2010-11-17 06:03:36 -0500 |
---|---|---|
committer | Eric Miao <eric.y.miao@gmail.com> | 2010-12-16 01:31:19 -0500 |
commit | bb71bdd31b48efa2b9834f1a47eb5f657e3c217c (patch) | |
tree | 1d5592c2e91d33f7d9ac799e0215fb7c66c1b976 /arch/arm/mach-pxa/irq.c | |
parent | d04e67cd1d088762c17e8edf08fbc14e4af1981a (diff) |
ARM: pxa: redefine irqs.h
Define all IRQs in irqs.h. If some IRQs are sharing one IRQ number, define
them together. If some IRQs are sharing same name with different IRQ number,
define different IRQ.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-pxa/irq.c')
-rw-r--r-- | arch/arm/mach-pxa/irq.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 1beb40f692fc..b5cafe2b4888 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
@@ -37,6 +37,11 @@ | |||
37 | 37 | ||
38 | static int pxa_internal_irq_nr; | 38 | static int pxa_internal_irq_nr; |
39 | 39 | ||
40 | static inline int cpu_has_ipr(void) | ||
41 | { | ||
42 | return !cpu_is_pxa25x(); | ||
43 | } | ||
44 | |||
40 | static void pxa_mask_irq(unsigned int irq) | 45 | static void pxa_mask_irq(unsigned int irq) |
41 | { | 46 | { |
42 | _ICMR(irq) &= ~(1 << IRQ_BIT(irq)); | 47 | _ICMR(irq) &= ~(1 << IRQ_BIT(irq)); |
@@ -134,7 +139,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn) | |||
134 | } | 139 | } |
135 | 140 | ||
136 | /* initialize interrupt priority */ | 141 | /* initialize interrupt priority */ |
137 | if (cpu_is_pxa27x() || cpu_is_pxa3xx()) { | 142 | if (cpu_has_ipr()) { |
138 | for (i = 0; i < irq_nr; i++) | 143 | for (i = 0; i < irq_nr; i++) |
139 | IPR(i) = i | (1 << 31); | 144 | IPR(i) = i | (1 << 31); |
140 | } | 145 | } |
@@ -165,7 +170,7 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state) | |||
165 | _ICMR(irq) = 0; | 170 | _ICMR(irq) = 0; |
166 | } | 171 | } |
167 | 172 | ||
168 | if (cpu_is_pxa27x() || cpu_is_pxa3xx()) { | 173 | if (cpu_has_ipr()) { |
169 | for (i = 0; i < pxa_internal_irq_nr; i++) | 174 | for (i = 0; i < pxa_internal_irq_nr; i++) |
170 | saved_ipr[i] = IPR(i); | 175 | saved_ipr[i] = IPR(i); |
171 | } | 176 | } |
@@ -177,7 +182,7 @@ static int pxa_irq_resume(struct sys_device *dev) | |||
177 | { | 182 | { |
178 | int i, irq = PXA_IRQ(0); | 183 | int i, irq = PXA_IRQ(0); |
179 | 184 | ||
180 | if (cpu_is_pxa27x() || cpu_is_pxa3xx()) { | 185 | if (cpu_has_ipr()) { |
181 | for (i = 0; i < pxa_internal_irq_nr; i++) | 186 | for (i = 0; i < pxa_internal_irq_nr; i++) |
182 | IPR(i) = saved_ipr[i]; | 187 | IPR(i) = saved_ipr[i]; |
183 | } | 188 | } |