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authorRobert Jarzmik <robert.jarzmik@free.fr>2014-11-24 17:18:22 -0500
committerRobert Jarzmik <robert.jarzmik@free.fr>2014-12-26 12:03:20 -0500
commit3ad32229bed9953dd2085ef992adb161ed0c9194 (patch)
treedf3af4431fd05ad5a88f4d9dab7494eeb507e852 /arch/arm/mach-pxa/include
parent95d8c4c8499f8a868af719ecfb005f55c959c73a (diff)
ARM: pxa: arbitrarily set first interrupt number
As IRQ0, the legacy timer interrupt should not be used as an interrupt number, shift the interrupts by a fixed number. As we had in a special case a shift of 16 when ISA bus was used on a PXA, use that value as the first interrupt number, regardless of ISA or not. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Diffstat (limited to 'arch/arm/mach-pxa/include')
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h9
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 48c2fd851686..83e04d4e72a8 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -12,14 +12,9 @@
12#ifndef __ASM_MACH_IRQS_H 12#ifndef __ASM_MACH_IRQS_H
13#define __ASM_MACH_IRQS_H 13#define __ASM_MACH_IRQS_H
14 14
15#ifdef CONFIG_PXA_HAVE_ISA_IRQS 15#include <asm/irq.h>
16#define PXA_ISA_IRQ(x) (x)
17#define PXA_ISA_IRQ_NUM (16)
18#else
19#define PXA_ISA_IRQ_NUM (0)
20#endif
21 16
22#define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x)) 17#define PXA_IRQ(x) (NR_IRQS_LEGACY + (x))
23 18
24#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ 19#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */
25#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */ 20#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */