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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-12-11 12:20:44 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-12-13 04:12:09 -0500
commit67fbc2312312095acc2f19a0b601bac10f84cf9d (patch)
treee33e8e2af363c7254fc22ebf5326046cc9a8df6e /arch/arm/mach-pxa/include
parent3e7a728117e4611b5e91fc567166f6e3606d996e (diff)
[ARM] fix xm_x2xx_defconfig build errors
drivers/built-in.o: In function `pci_set_consistent_dma_mask': hid-quirks.c:(.text+0x2664): multiple definition of `pci_set_consistent_dma_mask' drivers/built-in.o: In function `pci_set_dma_mask': hid-quirks.c:(.text+0x42c4): multiple definition of `pci_set_dma_mask' because drivers/pci/pci.c was not seeing the definition disabling these functions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa/include')
-rw-r--r--arch/arm/mach-pxa/include/mach/dma.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/hardware.h2
2 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/mach-pxa/include/mach/dma.h b/arch/arm/mach-pxa/include/mach/dma.h
index 955bfe606067..7804637a6df3 100644
--- a/arch/arm/mach-pxa/include/mach/dma.h
+++ b/arch/arm/mach-pxa/include/mach/dma.h
@@ -30,10 +30,6 @@ typedef enum {
30 DMA_PRIO_LOW = 2 30 DMA_PRIO_LOW = 2
31} pxa_dma_prio; 31} pxa_dma_prio;
32 32
33#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
34#define HAVE_ARCH_PCI_SET_DMA_MASK 1
35#endif
36
37/* 33/*
38 * DMA registration 34 * DMA registration
39 */ 35 */
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index e2d6784aa7ef..4e782ec38668 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -297,6 +297,8 @@ extern unsigned int get_memclk_frequency_10khz(void);
297#define PCIBIOS_MIN_IO 0 297#define PCIBIOS_MIN_IO 0
298#define PCIBIOS_MIN_MEM 0 298#define PCIBIOS_MIN_MEM 0
299#define pcibios_assign_all_busses() 1 299#define pcibios_assign_all_busses() 1
300#define HAVE_ARCH_PCI_SET_DMA_MASK 1
300#endif 301#endif
301 302
303
302#endif /* _ASM_ARCH_HARDWARE_H */ 304#endif /* _ASM_ARCH_HARDWARE_H */