diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-10-07 14:08:32 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-10-07 14:08:32 -0400 |
commit | cc513ac0f29473de365664c4fba9cf033c1f2324 (patch) | |
tree | 27ee53310699caa0e5cac80d519c0ec04120f8ca /arch/arm/mach-pxa/include | |
parent | 1543966a079fc7065849ae43ca4dd767c188ad55 (diff) | |
parent | 19ec95df2c4ec2d28919f267c4d17178f8fe9d9c (diff) |
Merge branch 'viper-for-rmk' of git://www.misterjones.org/linux-2.6-arm
Merge branch 'pxa-viper' into pxa-machines
Conflicts:
arch/arm/mach-pxa/Makefile
drivers/pcmcia/Kconfig
drivers/pcmcia/Makefile
Diffstat (limited to 'arch/arm/mach-pxa/include')
-rw-r--r-- | arch/arm/mach-pxa/include/mach/entry-macro.S | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/irqs.h | 19 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/viper.h | 96 |
3 files changed, 108 insertions, 11 deletions
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S index de16c12d5232..f6b4bf3e73d2 100644 --- a/arch/arm/mach-pxa/include/mach/entry-macro.S +++ b/arch/arm/mach-pxa/include/mach/entry-macro.S | |||
@@ -41,7 +41,7 @@ | |||
41 | and \irqstat, \irqstat, \irqnr | 41 | and \irqstat, \irqstat, \irqnr |
42 | clz \irqnr, \irqstat | 42 | clz \irqnr, \irqstat |
43 | rsb \irqnr, \irqnr, #31 | 43 | rsb \irqnr, \irqnr, #31 |
44 | add \irqnr, \irqnr, #32 | 44 | add \irqnr, \irqnr, #(32 + PXA_IRQ(0)) |
45 | b 1001f | 45 | b 1001f |
46 | 1003: | 46 | 1003: |
47 | mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP | 47 | mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP |
@@ -52,6 +52,6 @@ | |||
52 | rsb \irqstat, \irqnr, #0 | 52 | rsb \irqstat, \irqnr, #0 |
53 | and \irqstat, \irqstat, \irqnr | 53 | and \irqstat, \irqstat, \irqnr |
54 | clz \irqnr, \irqstat | 54 | clz \irqnr, \irqstat |
55 | rsb \irqnr, \irqnr, #31 | 55 | rsb \irqnr, \irqnr, #(31 + PXA_IRQ(0)) |
56 | 1001: | 56 | 1001: |
57 | .endm | 57 | .endm |
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 108b5db9b2af..9c163e19ada9 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h | |||
@@ -11,7 +11,14 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | 13 | ||
14 | #define PXA_IRQ(x) (x) | 14 | #ifdef CONFIG_PXA_HAVE_ISA_IRQS |
15 | #define PXA_ISA_IRQ(x) (x) | ||
16 | #define PXA_ISA_IRQ_NUM (16) | ||
17 | #else | ||
18 | #define PXA_ISA_IRQ_NUM (0) | ||
19 | #endif | ||
20 | |||
21 | #define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x)) | ||
15 | 22 | ||
16 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) | 23 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) |
17 | #define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ | 24 | #define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ |
@@ -73,7 +80,7 @@ | |||
73 | #define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ | 80 | #define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ |
74 | #endif | 81 | #endif |
75 | 82 | ||
76 | #define PXA_GPIO_IRQ_BASE (64) | 83 | #define PXA_GPIO_IRQ_BASE PXA_IRQ(64) |
77 | #define PXA_GPIO_IRQ_NUM (128) | 84 | #define PXA_GPIO_IRQ_NUM (128) |
78 | 85 | ||
79 | #define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) | 86 | #define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) |
@@ -178,13 +185,7 @@ | |||
178 | #define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) | 185 | #define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) |
179 | #elif defined(CONFIG_SHARP_LOCOMO) | 186 | #elif defined(CONFIG_SHARP_LOCOMO) |
180 | #define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) | 187 | #define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) |
181 | #elif defined(CONFIG_ARCH_LUBBOCK) || \ | 188 | #elif defined(CONFIG_PXA_HAVE_BOARD_IRQS) |
182 | defined(CONFIG_MACH_LOGICPD_PXA270) || \ | ||
183 | defined(CONFIG_MACH_TOSA) || \ | ||
184 | defined(CONFIG_MACH_MAINSTONE) || \ | ||
185 | defined(CONFIG_MACH_PCM027) || \ | ||
186 | defined(CONFIG_ARCH_PXA_ESERIES) || \ | ||
187 | defined(CONFIG_MACH_MAGICIAN) | ||
188 | #define NR_IRQS (IRQ_BOARD_END) | 189 | #define NR_IRQS (IRQ_BOARD_END) |
189 | #elif defined(CONFIG_MACH_ZYLONITE) | 190 | #elif defined(CONFIG_MACH_ZYLONITE) |
190 | #define NR_IRQS (IRQ_BOARD_START + 32) | 191 | #define NR_IRQS (IRQ_BOARD_START + 32) |
diff --git a/arch/arm/mach-pxa/include/mach/viper.h b/arch/arm/mach-pxa/include/mach/viper.h new file mode 100644 index 000000000000..10988c270ca3 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/viper.h | |||
@@ -0,0 +1,96 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pxa/include/mach/viper.h | ||
3 | * | ||
4 | * Author: Ian Campbell | ||
5 | * Created: Feb 03, 2003 | ||
6 | * Copyright: Arcom Control Systems. | ||
7 | * | ||
8 | * Maintained by Marc Zyngier <maz@misterjones.org> | ||
9 | * <marc.zyngier@altran.com> | ||
10 | * | ||
11 | * Created based on lubbock.h: | ||
12 | * Author: Nicolas Pitre | ||
13 | * Created: Jun 15, 2001 | ||
14 | * Copyright: MontaVista Software Inc. | ||
15 | * | ||
16 | * This program is free software; you can redistribute it and/or modify | ||
17 | * it under the terms of the GNU General Public License version 2 as | ||
18 | * published by the Free Software Foundation. | ||
19 | */ | ||
20 | |||
21 | #ifndef ARCH_VIPER_H | ||
22 | #define ARCH_VIPER_H | ||
23 | |||
24 | #define VIPER_BOOT_PHYS PXA_CS0_PHYS | ||
25 | #define VIPER_FLASH_PHYS PXA_CS1_PHYS | ||
26 | #define VIPER_ETH_PHYS PXA_CS2_PHYS | ||
27 | #define VIPER_USB_PHYS PXA_CS3_PHYS | ||
28 | #define VIPER_ETH_DATA_PHYS PXA_CS4_PHYS | ||
29 | #define VIPER_CPLD_PHYS PXA_CS5_PHYS | ||
30 | |||
31 | #define VIPER_CPLD_BASE (0xf0000000) | ||
32 | #define VIPER_PC104IO_BASE (0xf1000000) | ||
33 | #define VIPER_USB_BASE (0xf1800000) | ||
34 | |||
35 | #define VIPER_ETH_GPIO (0) | ||
36 | #define VIPER_CPLD_GPIO (1) | ||
37 | #define VIPER_USB_GPIO (2) | ||
38 | #define VIPER_UARTA_GPIO (4) | ||
39 | #define VIPER_UARTB_GPIO (3) | ||
40 | #define VIPER_CF_CD_GPIO (32) | ||
41 | #define VIPER_CF_RDY_GPIO (8) | ||
42 | #define VIPER_BCKLIGHT_EN_GPIO (9) | ||
43 | #define VIPER_LCD_EN_GPIO (10) | ||
44 | #define VIPER_PSU_DATA_GPIO (6) | ||
45 | #define VIPER_PSU_CLK_GPIO (11) | ||
46 | #define VIPER_UART_SHDN_GPIO (12) | ||
47 | #define VIPER_BRIGHTNESS_GPIO (16) | ||
48 | #define VIPER_PSU_nCS_LD_GPIO (19) | ||
49 | #define VIPER_UPS_GPIO (20) | ||
50 | #define VIPER_CF_POWER_GPIO (82) | ||
51 | #define VIPER_TPM_I2C_SDA_GPIO (26) | ||
52 | #define VIPER_TPM_I2C_SCL_GPIO (27) | ||
53 | #define VIPER_RTC_I2C_SDA_GPIO (83) | ||
54 | #define VIPER_RTC_I2C_SCL_GPIO (84) | ||
55 | |||
56 | #define VIPER_CPLD_P2V(x) ((x) - VIPER_CPLD_PHYS + VIPER_CPLD_BASE) | ||
57 | #define VIPER_CPLD_V2P(x) ((x) - VIPER_CPLD_BASE + VIPER_CPLD_PHYS) | ||
58 | |||
59 | #ifndef __ASSEMBLY__ | ||
60 | # define __VIPER_CPLD_REG(x) (*((volatile u16 *)VIPER_CPLD_P2V(x))) | ||
61 | #endif | ||
62 | |||
63 | /* board level registers in the CPLD: (offsets from CPLD_BASE) ... */ | ||
64 | |||
65 | /* ... Physical addresses */ | ||
66 | #define _VIPER_LO_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100000) | ||
67 | #define _VIPER_ICR_PHYS (VIPER_CPLD_PHYS + 0x100002) | ||
68 | #define _VIPER_HI_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100004) | ||
69 | #define _VIPER_VERSION_PHYS (VIPER_CPLD_PHYS + 0x100006) | ||
70 | #define VIPER_UARTA_PHYS (VIPER_CPLD_PHYS + 0x300010) | ||
71 | #define VIPER_UARTB_PHYS (VIPER_CPLD_PHYS + 0x300000) | ||
72 | #define _VIPER_SRAM_BASE (VIPER_CPLD_PHYS + 0x800000) | ||
73 | |||
74 | /* ... Virtual addresses */ | ||
75 | #define VIPER_LO_IRQ_STATUS __VIPER_CPLD_REG(_VIPER_LO_IRQ_STATUS) | ||
76 | #define VIPER_HI_IRQ_STATUS __VIPER_CPLD_REG(_VIPER_HI_IRQ_STATUS) | ||
77 | #define VIPER_VERSION __VIPER_CPLD_REG(_VIPER_VERSION_PHYS) | ||
78 | #define VIPER_ICR __VIPER_CPLD_REG(_VIPER_ICR_PHYS) | ||
79 | |||
80 | /* Decode VIPER_VERSION register */ | ||
81 | #define VIPER_CPLD_REVISION(x) (((x) >> 5) & 0x7) | ||
82 | #define VIPER_BOARD_VERSION(x) (((x) >> 3) & 0x3) | ||
83 | #define VIPER_BOARD_ISSUE(x) (((x) >> 0) & 0x7) | ||
84 | |||
85 | /* Interrupt and Configuration Register (VIPER_ICR) */ | ||
86 | /* This is a write only register. Only CF_RST is used under Linux */ | ||
87 | |||
88 | extern void viper_cf_rst(int state); | ||
89 | |||
90 | #define VIPER_ICR_RETRIG (1 << 0) | ||
91 | #define VIPER_ICR_AUTO_CLR (1 << 1) | ||
92 | #define VIPER_ICR_R_DIS (1 << 2) | ||
93 | #define VIPER_ICR_CF_RST (1 << 3) | ||
94 | |||
95 | #endif | ||
96 | |||