diff options
author | Haojian Zhuang <haojian.zhuang@marvell.com> | 2010-11-23 22:54:19 -0500 |
---|---|---|
committer | Eric Miao <eric.y.miao@gmail.com> | 2010-12-18 08:02:14 -0500 |
commit | a4553358d94b4a1f3e6f24aacfd076022ac14855 (patch) | |
tree | 7d6d7909730801a6f512aa2a7f637353ce0931bf /arch/arm/mach-pxa/include/mach | |
parent | aae8224ddd72e045bb92eaf6b73b89282c771c69 (diff) |
ARM: pxa: support pxa95x
The core of PXA955 is PJ4. Add new PJ4 support. And add new macro
CONFIG_PXA95x.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-pxa/include/mach')
-rw-r--r-- | arch/arm/mach-pxa/include/mach/hardware.h | 34 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/irqs.h | 1 |
2 files changed, 26 insertions, 9 deletions
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index e480d1e48130..6957ba56025b 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h | |||
@@ -195,14 +195,15 @@ | |||
195 | #define __cpu_is_pxa935(id) (0) | 195 | #define __cpu_is_pxa935(id) (0) |
196 | #endif | 196 | #endif |
197 | 197 | ||
198 | #ifdef CONFIG_CPU_PXA950 | 198 | #ifdef CONFIG_CPU_PXA955 |
199 | #define __cpu_is_pxa950(id) \ | 199 | #define __cpu_is_pxa955(id) \ |
200 | ({ \ | 200 | ({ \ |
201 | unsigned int _id = (id) >> 4 & 0xfff; \ | 201 | unsigned int _id = (id) >> 4 & 0xfff; \ |
202 | _id == 0x697; \ | 202 | _id == 0x581 || _id == 0xc08 \ |
203 | }) | 203 | || _id == 0xb76; \ |
204 | }) | ||
204 | #else | 205 | #else |
205 | #define __cpu_is_pxa950(id) (0) | 206 | #define __cpu_is_pxa955(id) (0) |
206 | #endif | 207 | #endif |
207 | 208 | ||
208 | #define cpu_is_pxa210() \ | 209 | #define cpu_is_pxa210() \ |
@@ -255,10 +256,10 @@ | |||
255 | __cpu_is_pxa935(read_cpuid_id()); \ | 256 | __cpu_is_pxa935(read_cpuid_id()); \ |
256 | }) | 257 | }) |
257 | 258 | ||
258 | #define cpu_is_pxa950() \ | 259 | #define cpu_is_pxa955() \ |
259 | ({ \ | 260 | ({ \ |
260 | __cpu_is_pxa950(read_cpuid_id()); \ | 261 | __cpu_is_pxa955(read_cpuid_id()); \ |
261 | }) | 262 | }) |
262 | 263 | ||
263 | 264 | ||
264 | /* | 265 | /* |
@@ -297,6 +298,15 @@ | |||
297 | #define __cpu_is_pxa93x(id) (0) | 298 | #define __cpu_is_pxa93x(id) (0) |
298 | #endif | 299 | #endif |
299 | 300 | ||
301 | #ifdef CONFIG_PXA95x | ||
302 | #define __cpu_is_pxa95x(id) \ | ||
303 | ({ \ | ||
304 | __cpu_is_pxa955(id); \ | ||
305 | }) | ||
306 | #else | ||
307 | #define __cpu_is_pxa95x(id) (0) | ||
308 | #endif | ||
309 | |||
300 | #define cpu_is_pxa2xx() \ | 310 | #define cpu_is_pxa2xx() \ |
301 | ({ \ | 311 | ({ \ |
302 | __cpu_is_pxa2xx(read_cpuid_id()); \ | 312 | __cpu_is_pxa2xx(read_cpuid_id()); \ |
@@ -311,6 +321,12 @@ | |||
311 | ({ \ | 321 | ({ \ |
312 | __cpu_is_pxa93x(read_cpuid_id()); \ | 322 | __cpu_is_pxa93x(read_cpuid_id()); \ |
313 | }) | 323 | }) |
324 | |||
325 | #define cpu_is_pxa95x() \ | ||
326 | ({ \ | ||
327 | __cpu_is_pxa95x(read_cpuid_id()); \ | ||
328 | }) | ||
329 | |||
314 | /* | 330 | /* |
315 | * return current memory and LCD clock frequency in units of 10kHz | 331 | * return current memory and LCD clock frequency in units of 10kHz |
316 | */ | 332 | */ |
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index cb7ee2665b29..a4285fc00878 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h | |||
@@ -84,6 +84,7 @@ | |||
84 | #define IRQ_PXA935_MMC0 PXA_IRQ(72) /* MMC0 Controller (PXA935) */ | 84 | #define IRQ_PXA935_MMC0 PXA_IRQ(72) /* MMC0 Controller (PXA935) */ |
85 | #define IRQ_PXA935_MMC1 PXA_IRQ(73) /* MMC1 Controller (PXA935) */ | 85 | #define IRQ_PXA935_MMC1 PXA_IRQ(73) /* MMC1 Controller (PXA935) */ |
86 | #define IRQ_PXA935_MMC2 PXA_IRQ(74) /* MMC2 Controller (PXA935) */ | 86 | #define IRQ_PXA935_MMC2 PXA_IRQ(74) /* MMC2 Controller (PXA935) */ |
87 | #define IRQ_PXA955_MMC3 PXA_IRQ(75) /* MMC3 Controller (PXA955) */ | ||
87 | #define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ | 88 | #define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ |
88 | 89 | ||
89 | #define PXA_GPIO_IRQ_BASE PXA_IRQ(96) | 90 | #define PXA_GPIO_IRQ_BASE PXA_IRQ(96) |