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authorMarc Zyngier <maz@misterjones.org>2009-11-05 02:10:10 -0500
committerEric Miao <eric.y.miao@gmail.com>2009-11-13 03:25:46 -0500
commitb2b36316626f0d6b92c3675a2aa2726efc71d146 (patch)
tree582b2e2f75cbb4fdaf759e6c9eca9f7aee7319f7 /arch/arm/mach-pxa/include/mach/entry-macro.S
parent156171c71a0dc4bce12b4408bb1591f8fe32dc1a (diff)
[ARM] pxa: fix interrupts number calculation when CONFIG_PXA_HAVE_ISA_IRQS=y
Commit d2c37068429b29d6549cf3486fc84b836689e122 ([ARM] pxa: initialize default interrupt priority and use ICHP for IRQ handling) broke ISA interrupt support on pxa27x/3xx. In such a case, PXA_IRQ(0) != 0, and the IRQ number computed from ICHP must be offset by PXA_IRQ(0). Tested on an Arcom Zeus (pxa270), with both CONFIG_PXA_HAVE_ISA_IRQS enabled and disabled. Signed-off-by: Marc Zyngier <maz@misterjones.org> Tested-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-pxa/include/mach/entry-macro.S')
-rw-r--r--arch/arm/mach-pxa/include/mach/entry-macro.S1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S
index 241880608ac6..a73bc86a3c26 100644
--- a/arch/arm/mach-pxa/include/mach/entry-macro.S
+++ b/arch/arm/mach-pxa/include/mach/entry-macro.S
@@ -46,5 +46,6 @@
46 beq 1001f 46 beq 1001f
47 bic \irqstat, \irqstat, #0x80000000 47 bic \irqstat, \irqstat, #0x80000000
48 mov \irqnr, \irqstat, lsr #16 48 mov \irqnr, \irqstat, lsr #16
49 add \irqnr, \irqnr, #(PXA_IRQ(0))
491001: 501001:
50 .endm 51 .endm