diff options
author | eric miao <eric.miao@marvell.com> | 2008-03-03 22:42:26 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-04-19 06:29:03 -0400 |
commit | e3630db1fa7677b350fd5a1ac5498cc48448ae28 (patch) | |
tree | 13fb517ac69a7a7a34851a0c4019d65f0b1bab8c /arch/arm/mach-pxa/gpio.c | |
parent | 0e037bbb4a639fff01cebf552db19237ec688678 (diff) |
[ARM] pxa: move GPIO IRQ specific code out of irq.c into gpio.c
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa/gpio.c')
-rw-r--r-- | arch/arm/mach-pxa/gpio.c | 183 |
1 files changed, 183 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c index 37b5b83fe240..a64227254151 100644 --- a/arch/arm/mach-pxa/gpio.c +++ b/arch/arm/mach-pxa/gpio.c | |||
@@ -14,6 +14,7 @@ | |||
14 | 14 | ||
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/module.h> | 16 | #include <linux/module.h> |
17 | #include <linux/irq.h> | ||
17 | 18 | ||
18 | #include <asm/gpio.h> | 19 | #include <asm/gpio.h> |
19 | #include <asm/hardware.h> | 20 | #include <asm/hardware.h> |
@@ -165,3 +166,185 @@ void __init pxa_init_gpio(int gpio_nr) | |||
165 | gpiochip_add(&pxa_gpio_chip[i/32].chip); | 166 | gpiochip_add(&pxa_gpio_chip[i/32].chip); |
166 | } | 167 | } |
167 | } | 168 | } |
169 | |||
170 | /* | ||
171 | * PXA GPIO edge detection for IRQs: | ||
172 | * IRQs are generated on Falling-Edge, Rising-Edge, or both. | ||
173 | * Use this instead of directly setting GRER/GFER. | ||
174 | */ | ||
175 | |||
176 | static long GPIO_IRQ_rising_edge[4]; | ||
177 | static long GPIO_IRQ_falling_edge[4]; | ||
178 | static long GPIO_IRQ_mask[4]; | ||
179 | |||
180 | static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) | ||
181 | { | ||
182 | int gpio, idx; | ||
183 | |||
184 | gpio = IRQ_TO_GPIO(irq); | ||
185 | idx = gpio >> 5; | ||
186 | |||
187 | if (type == IRQ_TYPE_PROBE) { | ||
188 | /* Don't mess with enabled GPIOs using preconfigured edges or | ||
189 | * GPIOs set to alternate function or to output during probe | ||
190 | */ | ||
191 | if ((GPIO_IRQ_rising_edge[idx] | | ||
192 | GPIO_IRQ_falling_edge[idx] | | ||
193 | GPDR(gpio)) & GPIO_bit(gpio)) | ||
194 | return 0; | ||
195 | if (GAFR(gpio) & (0x3 << (((gpio) & 0xf)*2))) | ||
196 | return 0; | ||
197 | type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; | ||
198 | } | ||
199 | |||
200 | pxa_gpio_mode(gpio | GPIO_IN); | ||
201 | |||
202 | if (type & IRQ_TYPE_EDGE_RISING) | ||
203 | __set_bit(gpio, GPIO_IRQ_rising_edge); | ||
204 | else | ||
205 | __clear_bit(gpio, GPIO_IRQ_rising_edge); | ||
206 | |||
207 | if (type & IRQ_TYPE_EDGE_FALLING) | ||
208 | __set_bit(gpio, GPIO_IRQ_falling_edge); | ||
209 | else | ||
210 | __clear_bit(gpio, GPIO_IRQ_falling_edge); | ||
211 | |||
212 | GRER(gpio) = GPIO_IRQ_rising_edge[idx] & GPIO_IRQ_mask[idx]; | ||
213 | GFER(gpio) = GPIO_IRQ_falling_edge[idx] & GPIO_IRQ_mask[idx]; | ||
214 | |||
215 | pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, irq, gpio, | ||
216 | ((type & IRQ_TYPE_EDGE_RISING) ? " rising" : ""), | ||
217 | ((type & IRQ_TYPE_EDGE_FALLING) ? " falling" : "")); | ||
218 | return 0; | ||
219 | } | ||
220 | |||
221 | /* | ||
222 | * GPIO IRQs must be acknowledged. This is for GPIO 0 and 1. | ||
223 | */ | ||
224 | |||
225 | static void pxa_ack_low_gpio(unsigned int irq) | ||
226 | { | ||
227 | GEDR0 = (1 << (irq - IRQ_GPIO0)); | ||
228 | } | ||
229 | |||
230 | static void pxa_mask_low_gpio(unsigned int irq) | ||
231 | { | ||
232 | ICMR &= ~(1 << (irq - PXA_IRQ(0))); | ||
233 | } | ||
234 | |||
235 | static void pxa_unmask_low_gpio(unsigned int irq) | ||
236 | { | ||
237 | ICMR |= 1 << (irq - PXA_IRQ(0)); | ||
238 | } | ||
239 | |||
240 | static struct irq_chip pxa_low_gpio_chip = { | ||
241 | .name = "GPIO-l", | ||
242 | .ack = pxa_ack_low_gpio, | ||
243 | .mask = pxa_mask_low_gpio, | ||
244 | .unmask = pxa_unmask_low_gpio, | ||
245 | .set_type = pxa_gpio_irq_type, | ||
246 | }; | ||
247 | |||
248 | /* | ||
249 | * Demux handler for GPIO>=2 edge detect interrupts | ||
250 | */ | ||
251 | |||
252 | #define GEDR_BITS (sizeof(gedr) * BITS_PER_BYTE) | ||
253 | |||
254 | static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc) | ||
255 | { | ||
256 | int loop, bit, n; | ||
257 | unsigned long gedr[4]; | ||
258 | |||
259 | do { | ||
260 | gedr[0] = GEDR0 & GPIO_IRQ_mask[0] & ~3; | ||
261 | gedr[1] = GEDR1 & GPIO_IRQ_mask[1]; | ||
262 | gedr[2] = GEDR2 & GPIO_IRQ_mask[2]; | ||
263 | gedr[3] = GEDR3 & GPIO_IRQ_mask[3]; | ||
264 | |||
265 | GEDR0 = gedr[0]; GEDR1 = gedr[1]; | ||
266 | GEDR2 = gedr[2]; GEDR3 = gedr[3]; | ||
267 | |||
268 | loop = 0; | ||
269 | bit = find_first_bit(gedr, GEDR_BITS); | ||
270 | while (bit < GEDR_BITS) { | ||
271 | loop = 1; | ||
272 | |||
273 | n = PXA_GPIO_IRQ_BASE + bit; | ||
274 | desc_handle_irq(n, irq_desc + n); | ||
275 | |||
276 | bit = find_next_bit(gedr, GEDR_BITS, bit + 1); | ||
277 | } | ||
278 | } while (loop); | ||
279 | } | ||
280 | |||
281 | static void pxa_ack_muxed_gpio(unsigned int irq) | ||
282 | { | ||
283 | int gpio = irq - IRQ_GPIO(2) + 2; | ||
284 | GEDR(gpio) = GPIO_bit(gpio); | ||
285 | } | ||
286 | |||
287 | static void pxa_mask_muxed_gpio(unsigned int irq) | ||
288 | { | ||
289 | int gpio = irq - IRQ_GPIO(2) + 2; | ||
290 | __clear_bit(gpio, GPIO_IRQ_mask); | ||
291 | GRER(gpio) &= ~GPIO_bit(gpio); | ||
292 | GFER(gpio) &= ~GPIO_bit(gpio); | ||
293 | } | ||
294 | |||
295 | static void pxa_unmask_muxed_gpio(unsigned int irq) | ||
296 | { | ||
297 | int gpio = irq - IRQ_GPIO(2) + 2; | ||
298 | int idx = gpio >> 5; | ||
299 | __set_bit(gpio, GPIO_IRQ_mask); | ||
300 | GRER(gpio) = GPIO_IRQ_rising_edge[idx] & GPIO_IRQ_mask[idx]; | ||
301 | GFER(gpio) = GPIO_IRQ_falling_edge[idx] & GPIO_IRQ_mask[idx]; | ||
302 | } | ||
303 | |||
304 | static struct irq_chip pxa_muxed_gpio_chip = { | ||
305 | .name = "GPIO", | ||
306 | .ack = pxa_ack_muxed_gpio, | ||
307 | .mask = pxa_mask_muxed_gpio, | ||
308 | .unmask = pxa_unmask_muxed_gpio, | ||
309 | .set_type = pxa_gpio_irq_type, | ||
310 | }; | ||
311 | |||
312 | void __init pxa_init_irq_gpio(int gpio_nr) | ||
313 | { | ||
314 | int irq, i; | ||
315 | |||
316 | pxa_last_gpio = gpio_nr - 1; | ||
317 | |||
318 | /* clear all GPIO edge detects */ | ||
319 | for (i = 0; i < gpio_nr; i += 32) { | ||
320 | GFER(i) = 0; | ||
321 | GRER(i) = 0; | ||
322 | GEDR(i) = GEDR(i); | ||
323 | } | ||
324 | |||
325 | /* GPIO 0 and 1 must have their mask bit always set */ | ||
326 | GPIO_IRQ_mask[0] = 3; | ||
327 | |||
328 | for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { | ||
329 | set_irq_chip(irq, &pxa_low_gpio_chip); | ||
330 | set_irq_handler(irq, handle_edge_irq); | ||
331 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | ||
332 | } | ||
333 | |||
334 | for (irq = IRQ_GPIO(2); irq < IRQ_GPIO(gpio_nr); irq++) { | ||
335 | set_irq_chip(irq, &pxa_muxed_gpio_chip); | ||
336 | set_irq_handler(irq, handle_edge_irq); | ||
337 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | ||
338 | } | ||
339 | |||
340 | /* Install handler for GPIO>=2 edge detect interrupts */ | ||
341 | set_irq_chained_handler(IRQ_GPIO_2_x, pxa_gpio_demux_handler); | ||
342 | |||
343 | pxa_init_gpio(gpio_nr); | ||
344 | } | ||
345 | |||
346 | void __init pxa_init_gpio_set_wake(int (*set_wake)(unsigned int, unsigned int)) | ||
347 | { | ||
348 | pxa_low_gpio_chip.set_wake = set_wake; | ||
349 | pxa_muxed_gpio_chip.set_wake = set_wake; | ||
350 | } | ||