diff options
author | Mike Rapoport <mike@compulab.co.il> | 2008-10-05 05:29:59 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-10-07 07:08:14 -0400 |
commit | 49a7061dcaaf068fd691cb4ff098e4f20cbf6c23 (patch) | |
tree | 485dd1e041dfb2773178276295f81ae11b94a809 /arch/arm/mach-pxa/cm-x255.c | |
parent | 8616e2fb6930103a8408998777ec8a2332f5e89d (diff) |
[ARM] 5284/1: pxa: cm-x255: add NOR and NAND flash support
This patch adds support for NOR and NAND flashes on CM-X255.
The NAND flash support uses not yet merged GPIO NAND driver.
Signed-off-by: Russ Dill <russ.dill@gmail.com>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa/cm-x255.c')
-rw-r--r-- | arch/arm/mach-pxa/cm-x255.c | 116 |
1 files changed, 116 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c index 15c5b9dc6383..83a4cdf08176 100644 --- a/arch/arm/mach-pxa/cm-x255.c +++ b/arch/arm/mach-pxa/cm-x255.c | |||
@@ -12,6 +12,9 @@ | |||
12 | #include <linux/platform_device.h> | 12 | #include <linux/platform_device.h> |
13 | #include <linux/irq.h> | 13 | #include <linux/irq.h> |
14 | #include <linux/gpio.h> | 14 | #include <linux/gpio.h> |
15 | #include <linux/mtd/partitions.h> | ||
16 | #include <linux/mtd/physmap.h> | ||
17 | #include <linux/mtd/nand-gpio.h> | ||
15 | 18 | ||
16 | #include <linux/spi/spi.h> | 19 | #include <linux/spi/spi.h> |
17 | 20 | ||
@@ -26,6 +29,11 @@ | |||
26 | 29 | ||
27 | #include "generic.h" | 30 | #include "generic.h" |
28 | 31 | ||
32 | #define GPIO_NAND_CS (5) | ||
33 | #define GPIO_NAND_ALE (4) | ||
34 | #define GPIO_NAND_CLE (3) | ||
35 | #define GPIO_NAND_RB (10) | ||
36 | |||
29 | static unsigned long cmx255_pin_config[] = { | 37 | static unsigned long cmx255_pin_config[] = { |
30 | /* AC'97 */ | 38 | /* AC'97 */ |
31 | GPIO28_AC97_BITCLK, | 39 | GPIO28_AC97_BITCLK, |
@@ -134,9 +142,117 @@ static void __init cmx255_init_rtc(void) | |||
134 | static inline void cmx255_init_rtc(void) {} | 142 | static inline void cmx255_init_rtc(void) {} |
135 | #endif | 143 | #endif |
136 | 144 | ||
145 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) | ||
146 | static struct mtd_partition cmx255_nor_partitions[] = { | ||
147 | { | ||
148 | .name = "ARMmon", | ||
149 | .size = 0x00030000, | ||
150 | .offset = 0, | ||
151 | .mask_flags = MTD_WRITEABLE /* force read-only */ | ||
152 | } , { | ||
153 | .name = "ARMmon setup block", | ||
154 | .size = 0x00010000, | ||
155 | .offset = MTDPART_OFS_APPEND, | ||
156 | .mask_flags = MTD_WRITEABLE /* force read-only */ | ||
157 | } , { | ||
158 | .name = "kernel", | ||
159 | .size = 0x00160000, | ||
160 | .offset = MTDPART_OFS_APPEND, | ||
161 | } , { | ||
162 | .name = "ramdisk", | ||
163 | .size = MTDPART_SIZ_FULL, | ||
164 | .offset = MTDPART_OFS_APPEND | ||
165 | } | ||
166 | }; | ||
167 | |||
168 | static struct physmap_flash_data cmx255_nor_flash_data[] = { | ||
169 | { | ||
170 | .width = 2, /* bankwidth in bytes */ | ||
171 | .parts = cmx255_nor_partitions, | ||
172 | .nr_parts = ARRAY_SIZE(cmx255_nor_partitions) | ||
173 | } | ||
174 | }; | ||
175 | |||
176 | static struct resource cmx255_nor_resource = { | ||
177 | .start = PXA_CS0_PHYS, | ||
178 | .end = PXA_CS0_PHYS + SZ_8M - 1, | ||
179 | .flags = IORESOURCE_MEM, | ||
180 | }; | ||
181 | |||
182 | static struct platform_device cmx255_nor = { | ||
183 | .name = "physmap-flash", | ||
184 | .id = -1, | ||
185 | .dev = { | ||
186 | .platform_data = cmx255_nor_flash_data, | ||
187 | }, | ||
188 | .resource = &cmx255_nor_resource, | ||
189 | .num_resources = 1, | ||
190 | }; | ||
191 | |||
192 | static void __init cmx255_init_nor(void) | ||
193 | { | ||
194 | platform_device_register(&cmx255_nor); | ||
195 | } | ||
196 | #else | ||
197 | static inline void cmx255_init_nor(void) {} | ||
198 | #endif | ||
199 | |||
200 | #if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE) | ||
201 | static struct resource cmx255_nand_resource[] = { | ||
202 | [0] = { | ||
203 | .start = PXA_CS1_PHYS, | ||
204 | .end = PXA_CS1_PHYS + 11, | ||
205 | .flags = IORESOURCE_MEM, | ||
206 | }, | ||
207 | [1] = { | ||
208 | .start = PXA_CS5_PHYS, | ||
209 | .end = PXA_CS5_PHYS + 3, | ||
210 | .flags = IORESOURCE_MEM, | ||
211 | }, | ||
212 | }; | ||
213 | |||
214 | static struct mtd_partition cmx255_nand_parts[] = { | ||
215 | [0] = { | ||
216 | .name = "cmx255-nand", | ||
217 | .size = MTDPART_SIZ_FULL, | ||
218 | .offset = 0, | ||
219 | }, | ||
220 | }; | ||
221 | |||
222 | static struct gpio_nand_platdata cmx255_nand_platdata = { | ||
223 | .gpio_nce = GPIO_NAND_CS, | ||
224 | .gpio_cle = GPIO_NAND_CLE, | ||
225 | .gpio_ale = GPIO_NAND_ALE, | ||
226 | .gpio_rdy = GPIO_NAND_RB, | ||
227 | .gpio_nwp = -1, | ||
228 | .parts = cmx255_nand_parts, | ||
229 | .num_parts = ARRAY_SIZE(cmx255_nand_parts), | ||
230 | .chip_delay = 25, | ||
231 | }; | ||
232 | |||
233 | static struct platform_device cmx255_nand = { | ||
234 | .name = "gpio-nand", | ||
235 | .num_resources = ARRAY_SIZE(cmx255_nand_resource), | ||
236 | .resource = cmx255_nand_resource, | ||
237 | .id = -1, | ||
238 | .dev = { | ||
239 | .platform_data = &cmx255_nand_platdata, | ||
240 | } | ||
241 | }; | ||
242 | |||
243 | static void __init cmx255_init_nand(void) | ||
244 | { | ||
245 | platform_device_register(&cmx255_nand); | ||
246 | } | ||
247 | #else | ||
248 | static inline void cmx255_init_nand(void) {} | ||
249 | #endif | ||
250 | |||
137 | void __init cmx255_init(void) | 251 | void __init cmx255_init(void) |
138 | { | 252 | { |
139 | pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config)); | 253 | pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config)); |
140 | 254 | ||
141 | cmx255_init_rtc(); | 255 | cmx255_init_rtc(); |
256 | cmx255_init_nor(); | ||
257 | cmx255_init_nand(); | ||
142 | } | 258 | } |