diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2006-12-03 12:51:14 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-12-03 12:52:22 -0500 |
commit | afe4b25e7d9260d85fccb2d13c9933a987bdfc8a (patch) | |
tree | 9b603e52ef91531089b45e5860e89d91d2e01565 /arch/arm/mach-pxa/Kconfig | |
parent | f5236225a3858b505221a59233af1f1158be9139 (diff) |
[ARM] 3881/4: xscale: clean up cp0/cp1 handling
XScale cores either have a DSP coprocessor (which contains a single
40 bit accumulator register), or an iWMMXt coprocessor (which contains
eight 64 bit registers.)
Because of the small amount of state in the DSP coprocessor, access to
the DSP coprocessor (CP0) is always enabled, and DSP context switching
is done unconditionally on every task switch. Access to the iWMMXt
coprocessor (CP0/CP1) is enabled only when an iWMMXt instruction is
first issued, and iWMMXt context switching is done lazily.
CONFIG_IWMMXT is supposed to mean 'the cpu we will be running on will
have iWMMXt support', but boards are supposed to select this config
symbol by hand, and at least one pxa27x board doesn't get this right,
so on that board, proc-xscale.S will incorrectly assume that we have a
DSP coprocessor, enable CP0 on boot, and we will then only save the
first iWMMXt register (wR0) on context switches, which is Bad.
This patch redefines CONFIG_IWMMXT as 'the cpu we will be running on
might have iWMMXt support, and we will enable iWMMXt context switching
if it does.' This means that with this patch, running a CONFIG_IWMMXT=n
kernel on an iWMMXt-capable CPU will no longer potentially corrupt iWMMXt
state over context switches, and running a CONFIG_IWMMXT=y kernel on a
non-iWMMXt capable CPU will still do DSP context save/restore.
These changes should make iWMMXt work on PXA3xx, and as a side effect,
enable proper acc0 save/restore on non-iWMMXt capable xsc3 cores such
as IOP13xx and IXP23xx (which will not have CONFIG_CPU_XSCALE defined),
as well as setting and using HWCAP_IWMMXT properly.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa/Kconfig')
-rw-r--r-- | arch/arm/mach-pxa/Kconfig | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 03d07cae26c8..9e3d0bdcba07 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
@@ -13,12 +13,10 @@ config ARCH_LUBBOCK | |||
13 | config MACH_LOGICPD_PXA270 | 13 | config MACH_LOGICPD_PXA270 |
14 | bool "LogicPD PXA270 Card Engine Development Platform" | 14 | bool "LogicPD PXA270 Card Engine Development Platform" |
15 | select PXA27x | 15 | select PXA27x |
16 | select IWMMXT | ||
17 | 16 | ||
18 | config MACH_MAINSTONE | 17 | config MACH_MAINSTONE |
19 | bool "Intel HCDDBBVA0 Development Platform" | 18 | bool "Intel HCDDBBVA0 Development Platform" |
20 | select PXA27x | 19 | select PXA27x |
21 | select IWMMXT | ||
22 | 20 | ||
23 | config ARCH_PXA_IDP | 21 | config ARCH_PXA_IDP |
24 | bool "Accelent Xscale IDP" | 22 | bool "Accelent Xscale IDP" |
@@ -53,7 +51,6 @@ config PXA_SHARPSL_25x | |||
53 | config PXA_SHARPSL_27x | 51 | config PXA_SHARPSL_27x |
54 | bool "Sharp PXA270 models (SL-Cxx00)" | 52 | bool "Sharp PXA270 models (SL-Cxx00)" |
55 | select PXA27x | 53 | select PXA27x |
56 | select IWMMXT | ||
57 | 54 | ||
58 | endchoice | 55 | endchoice |
59 | 56 | ||
@@ -129,11 +126,6 @@ config PXA27x | |||
129 | help | 126 | help |
130 | Select code specific to PXA27x variants | 127 | Select code specific to PXA27x variants |
131 | 128 | ||
132 | config IWMMXT | ||
133 | bool | ||
134 | help | ||
135 | Enable support for iWMMXt | ||
136 | |||
137 | config PXA_SHARP_C7xx | 129 | config PXA_SHARP_C7xx |
138 | bool | 130 | bool |
139 | select PXA_SSP | 131 | select PXA_SSP |