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authorBarry Song <Baohua.Song@csr.com>2012-12-20 06:11:18 -0500
committerBarry Song <Barry.Song@csr.com>2013-01-22 06:39:14 -0500
commitf2a94192d953990c5c928f52dd4122a67f93b980 (patch)
tree77bf983dc45303a627cc342939c5eee3d00087c3 /arch/arm/mach-prima2
parent598548facd3c55d1da230a2cc0e6026053b04594 (diff)
ARM: PRIMA2: irq: make prima2 irq can work even we enable GIC for Marco
in Marco, we will use GIC. this patch prepares the handle_irq for prima2 to avoid the compiling errors since we want only one defconfig and zImage for both prima2 and marco that means we will need handle_irq for both. Signed-off-by: Baohua Song <Baohua.Song@csr.com>
Diffstat (limited to 'arch/arm/mach-prima2')
-rw-r--r--arch/arm/mach-prima2/common.c3
-rw-r--r--arch/arm/mach-prima2/common.h2
-rw-r--r--arch/arm/mach-prima2/include/mach/irqs.h4
-rw-r--r--arch/arm/mach-prima2/irq.c16
4 files changed, 21 insertions, 4 deletions
diff --git a/arch/arm/mach-prima2/common.c b/arch/arm/mach-prima2/common.c
index 8e6f6681b546..99f9c7e391f5 100644
--- a/arch/arm/mach-prima2/common.c
+++ b/arch/arm/mach-prima2/common.c
@@ -41,6 +41,9 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
41 .map_io = sirfsoc_map_lluart, 41 .map_io = sirfsoc_map_lluart,
42 .init_irq = sirfsoc_of_irq_init, 42 .init_irq = sirfsoc_of_irq_init,
43 .init_time = sirfsoc_prima2_timer_init, 43 .init_time = sirfsoc_prima2_timer_init,
44#ifdef CONFIG_MULTI_IRQ_HANDLER
45 .handle_irq = sirfsoc_handle_irq,
46#endif
44 .dma_zone_size = SZ_256M, 47 .dma_zone_size = SZ_256M,
45 .init_machine = sirfsoc_mach_init, 48 .init_machine = sirfsoc_mach_init,
46 .init_late = sirfsoc_init_late, 49 .init_late = sirfsoc_init_late,
diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h
index d6890b6833c9..a4f91a6de55e 100644
--- a/arch/arm/mach-prima2/common.h
+++ b/arch/arm/mach-prima2/common.h
@@ -11,12 +11,14 @@
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <asm/mach/time.h> 13#include <asm/mach/time.h>
14#include <asm/exception.h>
14 15
15extern void sirfsoc_prima2_timer_init(void); 16extern void sirfsoc_prima2_timer_init(void);
16 17
17extern void __init sirfsoc_of_irq_init(void); 18extern void __init sirfsoc_of_irq_init(void);
18extern void __init sirfsoc_of_clk_init(void); 19extern void __init sirfsoc_of_clk_init(void);
19extern void sirfsoc_restart(char, const char *); 20extern void sirfsoc_restart(char, const char *);
21extern asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs);
20 22
21#ifndef CONFIG_DEBUG_LL 23#ifndef CONFIG_DEBUG_LL
22static inline void sirfsoc_map_lluart(void) {} 24static inline void sirfsoc_map_lluart(void) {}
diff --git a/arch/arm/mach-prima2/include/mach/irqs.h b/arch/arm/mach-prima2/include/mach/irqs.h
index f6014a07541f..b778a0f248ed 100644
--- a/arch/arm/mach-prima2/include/mach/irqs.h
+++ b/arch/arm/mach-prima2/include/mach/irqs.h
@@ -10,8 +10,8 @@
10#define __ASM_ARCH_IRQS_H 10#define __ASM_ARCH_IRQS_H
11 11
12#define SIRFSOC_INTENAL_IRQ_START 0 12#define SIRFSOC_INTENAL_IRQ_START 0
13#define SIRFSOC_INTENAL_IRQ_END 59 13#define SIRFSOC_INTENAL_IRQ_END 127
14#define SIRFSOC_GPIO_IRQ_START (SIRFSOC_INTENAL_IRQ_END + 1) 14#define SIRFSOC_GPIO_IRQ_START (SIRFSOC_INTENAL_IRQ_END + 1)
15#define NR_IRQS 220 15#define NR_IRQS 288
16 16
17#endif 17#endif
diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c
index 7dee9176e77a..6c0f3e9c43fb 100644
--- a/arch/arm/mach-prima2/irq.c
+++ b/arch/arm/mach-prima2/irq.c
@@ -9,17 +9,19 @@
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/io.h> 10#include <linux/io.h>
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <mach/hardware.h>
13#include <asm/mach/irq.h>
14#include <linux/of.h> 12#include <linux/of.h>
15#include <linux/of_address.h> 13#include <linux/of_address.h>
16#include <linux/irqdomain.h> 14#include <linux/irqdomain.h>
17#include <linux/syscore_ops.h> 15#include <linux/syscore_ops.h>
16#include <asm/mach/irq.h>
17#include <asm/exception.h>
18#include <mach/hardware.h>
18 19
19#define SIRFSOC_INT_RISC_MASK0 0x0018 20#define SIRFSOC_INT_RISC_MASK0 0x0018
20#define SIRFSOC_INT_RISC_MASK1 0x001C 21#define SIRFSOC_INT_RISC_MASK1 0x001C
21#define SIRFSOC_INT_RISC_LEVEL0 0x0020 22#define SIRFSOC_INT_RISC_LEVEL0 0x0020
22#define SIRFSOC_INT_RISC_LEVEL1 0x0024 23#define SIRFSOC_INT_RISC_LEVEL1 0x0024
24#define SIRFSOC_INIT_IRQ_ID 0x0038
23 25
24void __iomem *sirfsoc_intc_base; 26void __iomem *sirfsoc_intc_base;
25 27
@@ -52,6 +54,16 @@ static __init void sirfsoc_irq_init(void)
52 writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_MASK1); 54 writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_MASK1);
53} 55}
54 56
57asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs)
58{
59 u32 irqstat, irqnr;
60
61 irqstat = readl_relaxed(sirfsoc_intc_base + SIRFSOC_INIT_IRQ_ID);
62 irqnr = irqstat & 0xff;
63
64 handle_IRQ(irqnr, regs);
65}
66
55static struct of_device_id intc_ids[] = { 67static struct of_device_id intc_ids[] = {
56 { .compatible = "sirf,prima2-intc" }, 68 { .compatible = "sirf,prima2-intc" },
57 {}, 69 {},