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authorBarry Song <Baohua.Song@csr.com>2011-09-15 22:16:28 -0400
committerBarry Song <Barry.Song@csr.com>2011-10-24 05:54:21 -0400
commit917d853564530dd5e73c8c1604e823465ff9b713 (patch)
treea3163bda42777b827d0678cd3d02d69ec811d63f /arch/arm/mach-prima2/l2x0.c
parent1e11bec9b09a28f81dd3173fec6b1c6c56b5e299 (diff)
ARM: CSR: call l2x0_of_init to init L2 cache of SiRFprimaII
Cc: Rob Herring <robherring2@gmail.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
Diffstat (limited to 'arch/arm/mach-prima2/l2x0.c')
-rw-r--r--arch/arm/mach-prima2/l2x0.c46
1 files changed, 9 insertions, 37 deletions
diff --git a/arch/arm/mach-prima2/l2x0.c b/arch/arm/mach-prima2/l2x0.c
index 9cda2057bcfb..c99837797d76 100644
--- a/arch/arm/mach-prima2/l2x0.c
+++ b/arch/arm/mach-prima2/l2x0.c
@@ -8,52 +8,24 @@
8 8
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/io.h>
12#include <linux/errno.h>
13#include <linux/of.h> 11#include <linux/of.h>
14#include <linux/of_address.h>
15#include <asm/hardware/cache-l2x0.h> 12#include <asm/hardware/cache-l2x0.h>
16#include <mach/memory.h>
17 13
18#define L2X0_ADDR_FILTERING_START 0xC00 14static struct of_device_id prima2_l2x0_ids[] = {
19#define L2X0_ADDR_FILTERING_END 0xC04 15 { .compatible = "sirf,prima2-pl310-cache" },
20 16 {},
21static struct of_device_id l2x_ids[] = {
22 { .compatible = "arm,pl310-cache" },
23}; 17};
24 18
25static int __init sirfsoc_of_l2x_init(void) 19static int __init sirfsoc_l2x0_init(void)
26{ 20{
27 struct device_node *np; 21 struct device_node *np;
28 void __iomem *sirfsoc_l2x_base;
29
30 np = of_find_matching_node(NULL, l2x_ids);
31 if (!np)
32 panic("unable to find compatible l2x node in dtb\n");
33
34 sirfsoc_l2x_base = of_iomap(np, 0);
35 if (!sirfsoc_l2x_base)
36 panic("unable to map l2x cpu registers\n");
37
38 of_node_put(np);
39
40 if (!(readl_relaxed(sirfsoc_l2x_base + L2X0_CTRL) & 1)) {
41 /*
42 * set the physical memory windows L2 cache will cover
43 */
44 writel_relaxed(PLAT_PHYS_OFFSET + 1024 * 1024 * 1024,
45 sirfsoc_l2x_base + L2X0_ADDR_FILTERING_END);
46 writel_relaxed(PLAT_PHYS_OFFSET | 0x1,
47 sirfsoc_l2x_base + L2X0_ADDR_FILTERING_START);
48 22
49 writel_relaxed(0, 23 np = of_find_matching_node(NULL, prima2_l2x0_ids);
50 sirfsoc_l2x_base + L2X0_TAG_LATENCY_CTRL); 24 if (np) {
51 writel_relaxed(0, 25 pr_info("Initializing prima2 L2 cache\n");
52 sirfsoc_l2x_base + L2X0_DATA_LATENCY_CTRL); 26 return l2x0_of_init(0x40000, 0);
53 } 27 }
54 l2x0_init((void __iomem *)sirfsoc_l2x_base, 0x00040000,
55 0x00000000);
56 28
57 return 0; 29 return 0;
58} 30}
59early_initcall(sirfsoc_of_l2x_init); 31early_initcall(sirfsoc_l2x0_init);