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authorLinus Torvalds <torvalds@g5.osdl.org>2006-10-06 13:53:39 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-06 13:59:54 -0400
commit0cd61b68c340a4f901a06e8bb5e0dea4353161c0 (patch)
treecfd72be941ecd172627a06dd61d98b55cec63a39 /arch/arm/mach-pnx4008
parentda104a83692cf07434ab3b20bf10093bdbc3f97e (diff)
Initial blind fixup for arm for irq changes
Untested, but this should fix up the bulk of the totally mechanical issues, and should make the actual detail fixing easier. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/arm/mach-pnx4008')
-rw-r--r--arch/arm/mach-pnx4008/dma.c10
-rw-r--r--arch/arm/mach-pnx4008/time.c5
2 files changed, 6 insertions, 9 deletions
diff --git a/arch/arm/mach-pnx4008/dma.c b/arch/arm/mach-pnx4008/dma.c
index ec01574f88ac..d6a279e4b524 100644
--- a/arch/arm/mach-pnx4008/dma.c
+++ b/arch/arm/mach-pnx4008/dma.c
@@ -32,7 +32,7 @@
32 32
33static struct dma_channel { 33static struct dma_channel {
34 char *name; 34 char *name;
35 void (*irq_handler) (int, int, void *, struct pt_regs *); 35 void (*irq_handler) (int, int, void *);
36 void *data; 36 void *data;
37 struct pnx4008_dma_ll *ll; 37 struct pnx4008_dma_ll *ll;
38 u32 ll_dma; 38 u32 ll_dma;
@@ -150,8 +150,7 @@ static inline void pnx4008_dma_unlock(void)
150#define VALID_CHANNEL(c) (((c) >= 0) && ((c) < MAX_DMA_CHANNELS)) 150#define VALID_CHANNEL(c) (((c) >= 0) && ((c) < MAX_DMA_CHANNELS))
151 151
152int pnx4008_request_channel(char *name, int ch, 152int pnx4008_request_channel(char *name, int ch,
153 void (*irq_handler) (int, int, void *, 153 void (*irq_handler) (int, int, void *), void *data)
154 struct pt_regs *), void *data)
155{ 154{
156 int i, found = 0; 155 int i, found = 0;
157 156
@@ -1033,7 +1032,7 @@ int pnx4008_dma_ch_enabled(int ch)
1033 1032
1034EXPORT_SYMBOL_GPL(pnx4008_dma_ch_enabled); 1033EXPORT_SYMBOL_GPL(pnx4008_dma_ch_enabled);
1035 1034
1036static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs) 1035static irqreturn_t dma_irq_handler(int irq, void *dev_id)
1037{ 1036{
1038 int i; 1037 int i;
1039 unsigned long dint = __raw_readl(DMAC_INT_STAT); 1038 unsigned long dint = __raw_readl(DMAC_INT_STAT);
@@ -1053,8 +1052,7 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
1053 cause |= DMA_ERR_INT; 1052 cause |= DMA_ERR_INT;
1054 if (tcint & i_bit) 1053 if (tcint & i_bit)
1055 cause |= DMA_TC_INT; 1054 cause |= DMA_TC_INT;
1056 channel->irq_handler(i, cause, channel->data, 1055 channel->irq_handler(i, cause, channel->data);
1057 regs);
1058 } else { 1056 } else {
1059 /* 1057 /*
1060 * IRQ for an unregistered DMA channel 1058 * IRQ for an unregistered DMA channel
diff --git a/arch/arm/mach-pnx4008/time.c b/arch/arm/mach-pnx4008/time.c
index b986065cd0f3..8621c206ac84 100644
--- a/arch/arm/mach-pnx4008/time.c
+++ b/arch/arm/mach-pnx4008/time.c
@@ -47,15 +47,14 @@ static unsigned long pnx4008_gettimeoffset(void)
47/*! 47/*!
48 * IRQ handler for the timer 48 * IRQ handler for the timer
49 */ 49 */
50static irqreturn_t pnx4008_timer_interrupt(int irq, void *dev_id, 50static irqreturn_t pnx4008_timer_interrupt(int irq, void *dev_id)
51 struct pt_regs *regs)
52{ 51{
53 if (__raw_readl(HSTIM_INT) & MATCH0_INT) { 52 if (__raw_readl(HSTIM_INT) & MATCH0_INT) {
54 53
55 write_seqlock(&xtime_lock); 54 write_seqlock(&xtime_lock);
56 55
57 do { 56 do {
58 timer_tick(regs); 57 timer_tick();
59 58
60 /* 59 /*
61 * this algorithm takes care of possible delay 60 * this algorithm takes care of possible delay