diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-08-08 14:38:42 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-08-08 14:38:42 -0400 |
commit | 49b75b87ce2dfbd99e59a50c3681b154d07e3a22 (patch) | |
tree | f14e1da19a13d87a512f9043c2f37fd75dd122b3 /arch/arm/mach-pnx4008/include/mach/clock.h | |
parent | f1c7f79b6ab4f7ada002a0fae47f462ede6b6857 (diff) | |
parent | 097d9eb537ff4d88b74c3fe67392e27c478ca3c5 (diff) |
Merge branch 'for-linus-merged' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus-merged' of master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 5177/1: arm/mach-sa1100/Makefile: remove CONFIG_SA1100_USB
[ARM] 5166/1: magician: add MAINTAINERS entry
[ARM] fix pnx4008 build errors
[ARM] Fix SMP booting with non-zero PHYS_OFFSET
[ARM] 5185/1: Fix spi num_chipselect for lubbock
[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
[ARM] Add support for arch/arm/mach-*/include and arch/arm/plat-*/include
[ARM] Remove asm/hardware.h, use asm/arch/hardware.h instead
[ARM] Eliminate useless includes of asm/mach-types.h
[ARM] Fix circular include dependency with IRQ headers
avr32: Use <mach/foo.h> instead of <asm/arch/foo.h>
avr32: Introduce arch/avr32/mach-*/include/mach
avr32: Move include/asm-avr32 to arch/avr32/include/asm
[ARM] sa1100_wdt: use reset_status to remember watchdog reset status
[ARM] pxa: introduce reset_status and clear_reset_status for driver's usage
[ARM] pxa: introduce reset.h for reset specific header information
Diffstat (limited to 'arch/arm/mach-pnx4008/include/mach/clock.h')
-rw-r--r-- | arch/arm/mach-pnx4008/include/mach/clock.h | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/arch/arm/mach-pnx4008/include/mach/clock.h b/arch/arm/mach-pnx4008/include/mach/clock.h new file mode 100644 index 000000000000..8d2a5ef52c90 --- /dev/null +++ b/arch/arm/mach-pnx4008/include/mach/clock.h | |||
@@ -0,0 +1,62 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pnx4008/include/mach/clock.h | ||
3 | * | ||
4 | * Clock control driver for PNX4008 - header file | ||
5 | * | ||
6 | * Authors: Vitaly Wool, Dmitry Chigirev <source@mvista.com> | ||
7 | * | ||
8 | * 2005 (c) MontaVista Software, Inc. This file is licensed under | ||
9 | * the terms of the GNU General Public License version 2. This program | ||
10 | * is licensed "as is" without any warranty of any kind, whether express | ||
11 | * or implied. | ||
12 | */ | ||
13 | #ifndef __PNX4008_CLOCK_H__ | ||
14 | #define __PNX4008_CLOCK_H__ | ||
15 | |||
16 | struct module; | ||
17 | struct clk; | ||
18 | |||
19 | #define PWRMAN_VA_BASE IO_ADDRESS(PNX4008_PWRMAN_BASE) | ||
20 | #define HCLKDIVCTRL_REG (PWRMAN_VA_BASE + 0x40) | ||
21 | #define PWRCTRL_REG (PWRMAN_VA_BASE + 0x44) | ||
22 | #define PLLCTRL_REG (PWRMAN_VA_BASE + 0x48) | ||
23 | #define OSC13CTRL_REG (PWRMAN_VA_BASE + 0x4c) | ||
24 | #define SYSCLKCTRL_REG (PWRMAN_VA_BASE + 0x50) | ||
25 | #define HCLKPLLCTRL_REG (PWRMAN_VA_BASE + 0x58) | ||
26 | #define USBCTRL_REG (PWRMAN_VA_BASE + 0x64) | ||
27 | #define SDRAMCLKCTRL_REG (PWRMAN_VA_BASE + 0x68) | ||
28 | #define MSCTRL_REG (PWRMAN_VA_BASE + 0x80) | ||
29 | #define BTCLKCTRL (PWRMAN_VA_BASE + 0x84) | ||
30 | #define DUMCLKCTRL_REG (PWRMAN_VA_BASE + 0x90) | ||
31 | #define I2CCLKCTRL_REG (PWRMAN_VA_BASE + 0xac) | ||
32 | #define KEYCLKCTRL_REG (PWRMAN_VA_BASE + 0xb0) | ||
33 | #define TSCLKCTRL_REG (PWRMAN_VA_BASE + 0xb4) | ||
34 | #define PWMCLKCTRL_REG (PWRMAN_VA_BASE + 0xb8) | ||
35 | #define TIMCLKCTRL_REG (PWRMAN_VA_BASE + 0xbc) | ||
36 | #define SPICTRL_REG (PWRMAN_VA_BASE + 0xc4) | ||
37 | #define FLASHCLKCTRL_REG (PWRMAN_VA_BASE + 0xc8) | ||
38 | #define UART3CLK_REG (PWRMAN_VA_BASE + 0xd0) | ||
39 | #define UARTCLKCTRL_REG (PWRMAN_VA_BASE + 0xe4) | ||
40 | #define DMACLKCTRL_REG (PWRMAN_VA_BASE + 0xe8) | ||
41 | #define AUTOCLK_CTRL (PWRMAN_VA_BASE + 0xec) | ||
42 | #define JPEGCLKCTRL_REG (PWRMAN_VA_BASE + 0xfc) | ||
43 | |||
44 | #define AUDIOCONFIG_VA_BASE IO_ADDRESS(PNX4008_AUDIOCONFIG_BASE) | ||
45 | #define DSPPLLCTRL_REG (AUDIOCONFIG_VA_BASE + 0x60) | ||
46 | #define DSPCLKCTRL_REG (AUDIOCONFIG_VA_BASE + 0x64) | ||
47 | #define AUDIOCLKCTRL_REG (AUDIOCONFIG_VA_BASE + 0x68) | ||
48 | #define AUDIOPLLCTRL_REG (AUDIOCONFIG_VA_BASE + 0x6C) | ||
49 | |||
50 | #define USB_OTG_CLKCTRL_REG IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0xff4) | ||
51 | |||
52 | #define VFP9CLKCTRL_REG IO_ADDRESS(PNX4008_DEBUG_BASE) | ||
53 | |||
54 | #define CLK_RATE_13MHZ 13000 | ||
55 | #define CLK_RATE_1MHZ 1000 | ||
56 | #define CLK_RATE_208MHZ 208000 | ||
57 | #define CLK_RATE_48MHZ 48000 | ||
58 | #define CLK_RATE_32KHZ 32 | ||
59 | |||
60 | #define PNX4008_UART_CLK CLK_RATE_13MHZ * 1000 /* in MHz */ | ||
61 | |||
62 | #endif | ||