diff options
author | Alexander Clouter <alex@digriz.org.uk> | 2011-01-08 06:55:25 -0500 |
---|---|---|
committer | Nicolas Pitre <nico@fluxnic.net> | 2011-03-03 15:53:34 -0500 |
commit | e25bac968d41d994e5295f89547bdff6cb40588a (patch) | |
tree | d81d317bd66d64bb4ec304a4453ba0e9552548f9 /arch/arm/mach-orion5x | |
parent | f5412be599602124d2bdd49947b231dd77c0bf99 (diff) |
[ARM] orion5x: accelerate NAND on the TS-78xx
The NAND supports 32bit reads and writes so lets stop shunting 8bit
chunks across the bus.
Doing a dumb 'dd' benchmark, this increases performance roughly like so:
* read: 1.3MB/s to 3.4MB/s
* write: 614kB/s to 882kB/s
Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Diffstat (limited to 'arch/arm/mach-orion5x')
-rw-r--r-- | arch/arm/mach-orion5x/ts78xx-setup.c | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index c1c1cd04bdde..89682e117fd6 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c | |||
@@ -191,6 +191,60 @@ static int ts78xx_ts_nand_dev_ready(struct mtd_info *mtd) | |||
191 | return readb(TS_NAND_CTRL) & 0x20; | 191 | return readb(TS_NAND_CTRL) & 0x20; |
192 | } | 192 | } |
193 | 193 | ||
194 | static void ts78xx_ts_nand_write_buf(struct mtd_info *mtd, | ||
195 | const uint8_t *buf, int len) | ||
196 | { | ||
197 | struct nand_chip *chip = mtd->priv; | ||
198 | void __iomem *io_base = chip->IO_ADDR_W; | ||
199 | unsigned long off = ((unsigned long)buf & 3); | ||
200 | int sz; | ||
201 | |||
202 | if (off) { | ||
203 | sz = min(4 - off, len); | ||
204 | writesb(io_base, buf, sz); | ||
205 | buf += sz; | ||
206 | len -= sz; | ||
207 | } | ||
208 | |||
209 | sz = len >> 2; | ||
210 | if (sz) { | ||
211 | u32 *buf32 = (u32 *)buf; | ||
212 | writesl(io_base, buf32, sz); | ||
213 | buf += sz << 2; | ||
214 | len -= sz << 2; | ||
215 | } | ||
216 | |||
217 | if (len) | ||
218 | writesb(io_base, buf, len); | ||
219 | } | ||
220 | |||
221 | static void ts78xx_ts_nand_read_buf(struct mtd_info *mtd, | ||
222 | uint8_t *buf, int len) | ||
223 | { | ||
224 | struct nand_chip *chip = mtd->priv; | ||
225 | void __iomem *io_base = chip->IO_ADDR_R; | ||
226 | unsigned long off = ((unsigned long)buf & 3); | ||
227 | int sz; | ||
228 | |||
229 | if (off) { | ||
230 | sz = min(4 - off, len); | ||
231 | readsb(io_base, buf, sz); | ||
232 | buf += sz; | ||
233 | len -= sz; | ||
234 | } | ||
235 | |||
236 | sz = len >> 2; | ||
237 | if (sz) { | ||
238 | u32 *buf32 = (u32 *)buf; | ||
239 | readsl(io_base, buf32, sz); | ||
240 | buf += sz << 2; | ||
241 | len -= sz << 2; | ||
242 | } | ||
243 | |||
244 | if (len) | ||
245 | readsb(io_base, buf, len); | ||
246 | } | ||
247 | |||
194 | const char *ts_nand_part_probes[] = { "cmdlinepart", NULL }; | 248 | const char *ts_nand_part_probes[] = { "cmdlinepart", NULL }; |
195 | 249 | ||
196 | static struct mtd_partition ts78xx_ts_nand_parts[] = { | 250 | static struct mtd_partition ts78xx_ts_nand_parts[] = { |
@@ -233,6 +287,8 @@ static struct platform_nand_data ts78xx_ts_nand_data = { | |||
233 | */ | 287 | */ |
234 | .cmd_ctrl = ts78xx_ts_nand_cmd_ctrl, | 288 | .cmd_ctrl = ts78xx_ts_nand_cmd_ctrl, |
235 | .dev_ready = ts78xx_ts_nand_dev_ready, | 289 | .dev_ready = ts78xx_ts_nand_dev_ready, |
290 | .write_buf = ts78xx_ts_nand_write_buf, | ||
291 | .read_buf = ts78xx_ts_nand_read_buf, | ||
236 | }, | 292 | }, |
237 | }; | 293 | }; |
238 | 294 | ||