aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-orion5x
diff options
context:
space:
mode:
authorLennert Buytenhek <buytenh@wantstofly.org>2010-12-14 06:54:03 -0500
committerNicolas Pitre <nico@fluxnic.net>2011-03-03 16:27:02 -0500
commit9eac6d0a4e7e5149a7f86575b46d710ad2e05fe2 (patch)
tree3f3eb4504f3221954a5adaae66e417d9a0883e71 /arch/arm/mach-orion5x
parent4ee1f6b574765a6c97f945e6b0277e5ccac38cb5 (diff)
ARM: Remove dependency of plat-orion GPIO code on mach directory includes.
This patch makes the various mach dirs that use the plat-orion GPIO code pass in GPIO-related platform info (GPIO controller base address, secondary base IRQ number, etc) explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Diffstat (limited to 'arch/arm/mach-orion5x')
-rw-r--r--arch/arm/mach-orion5x/include/mach/gpio.h28
-rw-r--r--arch/arm/mach-orion5x/include/mach/orion5x.h1
-rw-r--r--arch/arm/mach-orion5x/irq.c19
-rw-r--r--arch/arm/mach-orion5x/mpp.c3
4 files changed, 3 insertions, 48 deletions
diff --git a/arch/arm/mach-orion5x/include/mach/gpio.h b/arch/arm/mach-orion5x/include/mach/gpio.h
index d8182e87ac16..a1d0b78decb1 100644
--- a/arch/arm/mach-orion5x/include/mach/gpio.h
+++ b/arch/arm/mach-orion5x/include/mach/gpio.h
@@ -6,32 +6,4 @@
6 * warranty of any kind, whether express or implied. 6 * warranty of any kind, whether express or implied.
7 */ 7 */
8 8
9#ifndef __ASM_ARCH_GPIO_H
10#define __ASM_ARCH_GPIO_H
11
12#include <mach/irqs.h>
13#include <plat/gpio.h> 9#include <plat/gpio.h>
14#include <asm-generic/gpio.h> /* cansleep wrappers */
15
16#define GPIO_MAX 32
17#define GPIO_OUT(pin) ORION5X_DEV_BUS_REG(0x100)
18#define GPIO_IO_CONF(pin) ORION5X_DEV_BUS_REG(0x104)
19#define GPIO_BLINK_EN(pin) ORION5X_DEV_BUS_REG(0x108)
20#define GPIO_IN_POL(pin) ORION5X_DEV_BUS_REG(0x10c)
21#define GPIO_DATA_IN(pin) ORION5X_DEV_BUS_REG(0x110)
22#define GPIO_EDGE_CAUSE(pin) ORION5X_DEV_BUS_REG(0x114)
23#define GPIO_EDGE_MASK(pin) ORION5X_DEV_BUS_REG(0x118)
24#define GPIO_LEVEL_MASK(pin) ORION5X_DEV_BUS_REG(0x11c)
25
26static inline int gpio_to_irq(int pin)
27{
28 return pin + IRQ_ORION5X_GPIO_START;
29}
30
31static inline int irq_to_gpio(int irq)
32{
33 return irq - IRQ_ORION5X_GPIO_START;
34}
35
36
37#endif
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 2d8766570531..0a28bbc76891 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -73,6 +73,7 @@
73#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000) 73#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000)
74#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000) 74#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000)
75#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x)) 75#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x))
76#define GPIO_VIRT_BASE ORION5X_DEV_BUS_REG(0x0100)
76#define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x0600) 77#define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x0600)
77#define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000) 78#define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000)
78#define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000) 79#define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000)
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index d7512b925a85..ed85891f8699 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -28,27 +28,12 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
28 28
29void __init orion5x_init_irq(void) 29void __init orion5x_init_irq(void)
30{ 30{
31 int i;
32
33 orion_irq_init(0, (void __iomem *)MAIN_IRQ_MASK); 31 orion_irq_init(0, (void __iomem *)MAIN_IRQ_MASK);
34 32
35 /* 33 /*
36 * Mask and clear GPIO IRQ interrupts 34 * Initialize gpiolib for GPIOs 0-31.
37 */
38 writel(0x0, GPIO_LEVEL_MASK(0));
39 writel(0x0, GPIO_EDGE_MASK(0));
40 writel(0x0, GPIO_EDGE_CAUSE(0));
41
42 /*
43 * Register chained level handlers for GPIO IRQs by default.
44 * User can use set_type() if he wants to use edge types handlers.
45 */ 35 */
46 for (i = IRQ_ORION5X_GPIO_START; i < NR_IRQS; i++) { 36 orion_gpio_init(0, 32, GPIO_VIRT_BASE, 0, IRQ_ORION5X_GPIO_START);
47 set_irq_chip(i, &orion_gpio_irq_chip);
48 set_irq_handler(i, handle_level_irq);
49 irq_desc[i].status |= IRQ_LEVEL;
50 set_irq_flags(i, IRQF_VALID);
51 }
52 set_irq_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler); 37 set_irq_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler);
53 set_irq_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler); 38 set_irq_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler);
54 set_irq_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler); 39 set_irq_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler);
diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c
index db485d3b8144..2288207726e4 100644
--- a/arch/arm/mach-orion5x/mpp.c
+++ b/arch/arm/mach-orion5x/mpp.c
@@ -124,9 +124,6 @@ void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode)
124 u32 mpp_8_15_ctrl = readl(MPP_8_15_CTRL); 124 u32 mpp_8_15_ctrl = readl(MPP_8_15_CTRL);
125 u32 mpp_16_19_ctrl = readl(MPP_16_19_CTRL); 125 u32 mpp_16_19_ctrl = readl(MPP_16_19_CTRL);
126 126
127 /* Initialize gpiolib. */
128 orion_gpio_init();
129
130 for ( ; mode->mpp >= 0; mode++) { 127 for ( ; mode->mpp >= 0; mode++) {
131 u32 *reg; 128 u32 *reg;
132 int num_type; 129 int num_type;