diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-08-13 10:56:29 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-08-13 10:56:29 -0400 |
commit | 19ec6caca2da706f11646249ba280177fec359fa (patch) | |
tree | 6064421bc4924e7debdc8576a187cbdec4b8c352 /arch/arm/mach-orion5x | |
parent | 0d7614f09c1ebdbaa1599a5aba7593f147bf96ee (diff) | |
parent | dd9bf78040fa0da4cecc228e1682b9682b8cb180 (diff) |
Merge branch 'cleanup/io-pci' into next/cleanups
From Rob Herring <robherring2@gmail.com>:
This is the 2nd part of mach/io.h removals. This series removes io.h on
platforms with PCI by creating a fixed virtual I/O mapping and a common
__io() macro.
This version has changed a bit to accommodate Tegra converting its PCIe
host to a platform driver. Now the virtual space is only reserved during
early boot before .map_io() is called. The mapping is not created until
calling pci_ioremap_io which can be done at any point after vmalloc is
initialized.
I've gone back to fixed 64K windows for each PCI bus. This allows
removing all the i/o resource setup from the individually platforms and
placing it within the common ARM PCI code.
I've only tested versatilepb under qemu (with the model hacked up to
actually enable i/o space), so any testing is appreciated. iop3xx and
mv78xx0 have some risk of breaking as the PCI bus addresses are moved
to 0 from matching the cpu host bus addesss.
* cleanup/io-pci:
ARM: iop3xx: use fixed PCI i/o mapping
ARM: mv78xx0: use fixed pci i/o mapping
ARM: iop13xx: use fixed PCI i/o mapping
iop13xx: use more regular PCI I/O space handling
ARM: orion5x: use fixed PCI i/o mapping
ARM: kirkwood: use fixed PCI i/o mapping
ARM: dove: use fixed PCI i/o mapping
ARM: footbridge: use fixed PCI i/o mapping
ARM: shark: use fixed PCI i/o mapping
ARM: integrator: remove trailing whitespace on pci_v3.c
ARM: integrator: use fixed PCI i/o mapping
ARM: tegra: use fixed PCI i/o mapping
ARM: versatile: use fixed PCI i/o mapping
ARM: move PCI i/o resource setup into common code
ARM: Add fixed PCI i/o mapping
i2c: iop3xx: use standard gpiolib functions
i2c: iop3xx: clean-up trailing whitespace
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-orion5x')
-rw-r--r-- | arch/arm/mach-orion5x/common.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/include/mach/io.h | 22 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/include/mach/orion5x.h | 20 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/pci.c | 56 |
4 files changed, 27 insertions, 81 deletions
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 9148b229d0de..70f7d712d6f4 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c | |||
@@ -47,16 +47,6 @@ static struct map_desc orion5x_io_desc[] __initdata = { | |||
47 | .length = ORION5X_REGS_SIZE, | 47 | .length = ORION5X_REGS_SIZE, |
48 | .type = MT_DEVICE, | 48 | .type = MT_DEVICE, |
49 | }, { | 49 | }, { |
50 | .virtual = ORION5X_PCIE_IO_VIRT_BASE, | ||
51 | .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE), | ||
52 | .length = ORION5X_PCIE_IO_SIZE, | ||
53 | .type = MT_DEVICE, | ||
54 | }, { | ||
55 | .virtual = ORION5X_PCI_IO_VIRT_BASE, | ||
56 | .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE), | ||
57 | .length = ORION5X_PCI_IO_SIZE, | ||
58 | .type = MT_DEVICE, | ||
59 | }, { | ||
60 | .virtual = ORION5X_PCIE_WA_VIRT_BASE, | 50 | .virtual = ORION5X_PCIE_WA_VIRT_BASE, |
61 | .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE), | 51 | .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE), |
62 | .length = ORION5X_PCIE_WA_SIZE, | 52 | .length = ORION5X_PCIE_WA_SIZE, |
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h deleted file mode 100644 index 1aa5d0a50a0b..000000000000 --- a/arch/arm/mach-orion5x/include/mach/io.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion5x/include/mach/io.h | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARCH_IO_H | ||
10 | #define __ASM_ARCH_IO_H | ||
11 | |||
12 | #include <mach/orion5x.h> | ||
13 | #include <asm/sizes.h> | ||
14 | |||
15 | #define IO_SPACE_LIMIT SZ_2M | ||
16 | static inline void __iomem *__io(unsigned long addr) | ||
17 | { | ||
18 | return (void __iomem *)(addr + ORION5X_PCIE_IO_VIRT_BASE); | ||
19 | } | ||
20 | |||
21 | #define __io(a) __io(a) | ||
22 | #endif | ||
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h index 683e085ce162..1b60131b7f60 100644 --- a/arch/arm/mach-orion5x/include/mach/orion5x.h +++ b/arch/arm/mach-orion5x/include/mach/orion5x.h | |||
@@ -31,31 +31,29 @@ | |||
31 | * fc000000 device bus mappings (cs0/cs1) | 31 | * fc000000 device bus mappings (cs0/cs1) |
32 | * | 32 | * |
33 | * virt phys size | 33 | * virt phys size |
34 | * fdd00000 f1000000 1M on-chip peripheral registers | 34 | * fe000000 f1000000 1M on-chip peripheral registers |
35 | * fde00000 f2000000 1M PCIe I/O space | 35 | * fee00000 f2000000 64K PCIe I/O space |
36 | * fdf00000 f2100000 1M PCI I/O space | 36 | * fee10000 f2100000 64K PCI I/O space |
37 | * fe000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only) | 37 | * fd000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only) |
38 | ****************************************************************************/ | 38 | ****************************************************************************/ |
39 | #define ORION5X_REGS_PHYS_BASE 0xf1000000 | 39 | #define ORION5X_REGS_PHYS_BASE 0xf1000000 |
40 | #define ORION5X_REGS_VIRT_BASE 0xfdd00000 | 40 | #define ORION5X_REGS_VIRT_BASE 0xfe000000 |
41 | #define ORION5X_REGS_SIZE SZ_1M | 41 | #define ORION5X_REGS_SIZE SZ_1M |
42 | 42 | ||
43 | #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000 | 43 | #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000 |
44 | #define ORION5X_PCIE_IO_VIRT_BASE 0xfde00000 | ||
45 | #define ORION5X_PCIE_IO_BUS_BASE 0x00000000 | 44 | #define ORION5X_PCIE_IO_BUS_BASE 0x00000000 |
46 | #define ORION5X_PCIE_IO_SIZE SZ_1M | 45 | #define ORION5X_PCIE_IO_SIZE SZ_64K |
47 | 46 | ||
48 | #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000 | 47 | #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000 |
49 | #define ORION5X_PCI_IO_VIRT_BASE 0xfdf00000 | 48 | #define ORION5X_PCI_IO_BUS_BASE 0x00010000 |
50 | #define ORION5X_PCI_IO_BUS_BASE 0x00100000 | 49 | #define ORION5X_PCI_IO_SIZE SZ_64K |
51 | #define ORION5X_PCI_IO_SIZE SZ_1M | ||
52 | 50 | ||
53 | #define ORION5X_SRAM_PHYS_BASE (0xf2200000) | 51 | #define ORION5X_SRAM_PHYS_BASE (0xf2200000) |
54 | #define ORION5X_SRAM_SIZE SZ_8K | 52 | #define ORION5X_SRAM_SIZE SZ_8K |
55 | 53 | ||
56 | /* Relevant only for Orion-1/Orion-NAS */ | 54 | /* Relevant only for Orion-1/Orion-NAS */ |
57 | #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 | 55 | #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 |
58 | #define ORION5X_PCIE_WA_VIRT_BASE 0xfe000000 | 56 | #define ORION5X_PCIE_WA_VIRT_BASE 0xfd000000 |
59 | #define ORION5X_PCIE_WA_SIZE SZ_16M | 57 | #define ORION5X_PCIE_WA_SIZE SZ_16M |
60 | 58 | ||
61 | #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000 | 59 | #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000 |
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index cb19e1661bb3..6921d49b988d 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c | |||
@@ -162,35 +162,25 @@ static int __init pcie_setup(struct pci_sys_data *sys) | |||
162 | pcie_ops.read = pcie_rd_conf_wa; | 162 | pcie_ops.read = pcie_rd_conf_wa; |
163 | } | 163 | } |
164 | 164 | ||
165 | pci_ioremap_io(sys->busnr * SZ_64K, ORION5X_PCIE_IO_PHYS_BASE); | ||
166 | |||
165 | /* | 167 | /* |
166 | * Request resources. | 168 | * Request resources. |
167 | */ | 169 | */ |
168 | res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL); | 170 | res = kzalloc(sizeof(struct resource), GFP_KERNEL); |
169 | if (!res) | 171 | if (!res) |
170 | panic("pcie_setup unable to alloc resources"); | 172 | panic("pcie_setup unable to alloc resources"); |
171 | 173 | ||
172 | /* | 174 | /* |
173 | * IORESOURCE_IO | ||
174 | */ | ||
175 | sys->io_offset = 0; | ||
176 | res[0].name = "PCIe I/O Space"; | ||
177 | res[0].flags = IORESOURCE_IO; | ||
178 | res[0].start = ORION5X_PCIE_IO_BUS_BASE; | ||
179 | res[0].end = res[0].start + ORION5X_PCIE_IO_SIZE - 1; | ||
180 | if (request_resource(&ioport_resource, &res[0])) | ||
181 | panic("Request PCIe IO resource failed\n"); | ||
182 | pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset); | ||
183 | |||
184 | /* | ||
185 | * IORESOURCE_MEM | 175 | * IORESOURCE_MEM |
186 | */ | 176 | */ |
187 | res[1].name = "PCIe Memory Space"; | 177 | res->name = "PCIe Memory Space"; |
188 | res[1].flags = IORESOURCE_MEM; | 178 | res->flags = IORESOURCE_MEM; |
189 | res[1].start = ORION5X_PCIE_MEM_PHYS_BASE; | 179 | res->start = ORION5X_PCIE_MEM_PHYS_BASE; |
190 | res[1].end = res[1].start + ORION5X_PCIE_MEM_SIZE - 1; | 180 | res->end = res->start + ORION5X_PCIE_MEM_SIZE - 1; |
191 | if (request_resource(&iomem_resource, &res[1])) | 181 | if (request_resource(&iomem_resource, res)) |
192 | panic("Request PCIe Memory resource failed\n"); | 182 | panic("Request PCIe Memory resource failed\n"); |
193 | pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); | 183 | pci_add_resource_offset(&sys->resources, res, sys->mem_offset); |
194 | 184 | ||
195 | return 1; | 185 | return 1; |
196 | } | 186 | } |
@@ -489,35 +479,25 @@ static int __init pci_setup(struct pci_sys_data *sys) | |||
489 | */ | 479 | */ |
490 | orion5x_setbits(PCI_CMD, PCI_CMD_HOST_REORDER); | 480 | orion5x_setbits(PCI_CMD, PCI_CMD_HOST_REORDER); |
491 | 481 | ||
482 | pci_ioremap_io(sys->busnr * SZ_64K, ORION5X_PCI_IO_PHYS_BASE); | ||
483 | |||
492 | /* | 484 | /* |
493 | * Request resources | 485 | * Request resources |
494 | */ | 486 | */ |
495 | res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL); | 487 | res = kzalloc(sizeof(struct resource), GFP_KERNEL); |
496 | if (!res) | 488 | if (!res) |
497 | panic("pci_setup unable to alloc resources"); | 489 | panic("pci_setup unable to alloc resources"); |
498 | 490 | ||
499 | /* | 491 | /* |
500 | * IORESOURCE_IO | ||
501 | */ | ||
502 | sys->io_offset = 0; | ||
503 | res[0].name = "PCI I/O Space"; | ||
504 | res[0].flags = IORESOURCE_IO; | ||
505 | res[0].start = ORION5X_PCI_IO_BUS_BASE; | ||
506 | res[0].end = res[0].start + ORION5X_PCI_IO_SIZE - 1; | ||
507 | if (request_resource(&ioport_resource, &res[0])) | ||
508 | panic("Request PCI IO resource failed\n"); | ||
509 | pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset); | ||
510 | |||
511 | /* | ||
512 | * IORESOURCE_MEM | 492 | * IORESOURCE_MEM |
513 | */ | 493 | */ |
514 | res[1].name = "PCI Memory Space"; | 494 | res->name = "PCI Memory Space"; |
515 | res[1].flags = IORESOURCE_MEM; | 495 | res->flags = IORESOURCE_MEM; |
516 | res[1].start = ORION5X_PCI_MEM_PHYS_BASE; | 496 | res->start = ORION5X_PCI_MEM_PHYS_BASE; |
517 | res[1].end = res[1].start + ORION5X_PCI_MEM_SIZE - 1; | 497 | res->end = res->start + ORION5X_PCI_MEM_SIZE - 1; |
518 | if (request_resource(&iomem_resource, &res[1])) | 498 | if (request_resource(&iomem_resource, res)) |
519 | panic("Request PCI Memory resource failed\n"); | 499 | panic("Request PCI Memory resource failed\n"); |
520 | pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); | 500 | pci_add_resource_offset(&sys->resources, res, sys->mem_offset); |
521 | 501 | ||
522 | return 1; | 502 | return 1; |
523 | } | 503 | } |