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authorIngo Molnar <mingo@elte.hu>2008-07-28 15:14:43 -0400
committerIngo Molnar <mingo@elte.hu>2008-07-28 15:14:43 -0400
commit414f746d232d41ed6ae8632c4495ae795373c44b (patch)
tree167f9bc8f139c6e82e6732b38c7a938b8a9d31cd /arch/arm/mach-orion5x
parent5a7a201c51c324876d00a54e7208af6af12d1ca4 (diff)
parentc9272c4f9fbe2087beb3392f526dc5b19efaa56b (diff)
Merge branch 'linus' into cpus4096
Diffstat (limited to 'arch/arm/mach-orion5x')
-rw-r--r--arch/arm/mach-orion5x/db88f5281-setup.c4
-rw-r--r--arch/arm/mach-orion5x/irq.c12
-rw-r--r--arch/arm/mach-orion5x/rd88f5182-setup.c4
-rw-r--r--arch/arm/mach-orion5x/ts209-setup.c4
4 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index 88405e74e5e3..40a0bee4fbb3 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -213,7 +213,7 @@ void __init db88f5281_pci_preinit(void)
213 pin = DB88F5281_PCI_SLOT0_IRQ_PIN; 213 pin = DB88F5281_PCI_SLOT0_IRQ_PIN;
214 if (gpio_request(pin, "PCI Int1") == 0) { 214 if (gpio_request(pin, "PCI Int1") == 0) {
215 if (gpio_direction_input(pin) == 0) { 215 if (gpio_direction_input(pin) == 0) {
216 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 216 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
217 } else { 217 } else {
218 printk(KERN_ERR "db88f5281_pci_preinit faield to " 218 printk(KERN_ERR "db88f5281_pci_preinit faield to "
219 "set_irq_type pin %d\n", pin); 219 "set_irq_type pin %d\n", pin);
@@ -226,7 +226,7 @@ void __init db88f5281_pci_preinit(void)
226 pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN; 226 pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN;
227 if (gpio_request(pin, "PCI Int2") == 0) { 227 if (gpio_request(pin, "PCI Int2") == 0) {
228 if (gpio_direction_input(pin) == 0) { 228 if (gpio_direction_input(pin) == 0) {
229 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 229 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
230 } else { 230 } else {
231 printk(KERN_ERR "db88f5281_pci_preinit faield " 231 printk(KERN_ERR "db88f5281_pci_preinit faield "
232 "to set_irq_type pin %d\n", pin); 232 "to set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index e2a0084ab4a3..9ae3f6dc7839 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -91,27 +91,27 @@ static int orion5x_gpio_set_irq_type(u32 irq, u32 type)
91 desc = irq_desc + irq; 91 desc = irq_desc + irq;
92 92
93 switch (type) { 93 switch (type) {
94 case IRQT_HIGH: 94 case IRQ_TYPE_LEVEL_HIGH:
95 desc->handle_irq = handle_level_irq; 95 desc->handle_irq = handle_level_irq;
96 desc->status |= IRQ_LEVEL; 96 desc->status |= IRQ_LEVEL;
97 orion5x_clrbits(GPIO_IN_POL, (1 << pin)); 97 orion5x_clrbits(GPIO_IN_POL, (1 << pin));
98 break; 98 break;
99 case IRQT_LOW: 99 case IRQ_TYPE_LEVEL_LOW:
100 desc->handle_irq = handle_level_irq; 100 desc->handle_irq = handle_level_irq;
101 desc->status |= IRQ_LEVEL; 101 desc->status |= IRQ_LEVEL;
102 orion5x_setbits(GPIO_IN_POL, (1 << pin)); 102 orion5x_setbits(GPIO_IN_POL, (1 << pin));
103 break; 103 break;
104 case IRQT_RISING: 104 case IRQ_TYPE_EDGE_RISING:
105 desc->handle_irq = handle_edge_irq; 105 desc->handle_irq = handle_edge_irq;
106 desc->status &= ~IRQ_LEVEL; 106 desc->status &= ~IRQ_LEVEL;
107 orion5x_clrbits(GPIO_IN_POL, (1 << pin)); 107 orion5x_clrbits(GPIO_IN_POL, (1 << pin));
108 break; 108 break;
109 case IRQT_FALLING: 109 case IRQ_TYPE_EDGE_FALLING:
110 desc->handle_irq = handle_edge_irq; 110 desc->handle_irq = handle_edge_irq;
111 desc->status &= ~IRQ_LEVEL; 111 desc->status &= ~IRQ_LEVEL;
112 orion5x_setbits(GPIO_IN_POL, (1 << pin)); 112 orion5x_setbits(GPIO_IN_POL, (1 << pin));
113 break; 113 break;
114 case IRQT_BOTHEDGE: 114 case IRQ_TYPE_EDGE_BOTH:
115 desc->handle_irq = handle_edge_irq; 115 desc->handle_irq = handle_edge_irq;
116 desc->status &= ~IRQ_LEVEL; 116 desc->status &= ~IRQ_LEVEL;
117 /* 117 /*
@@ -156,7 +156,7 @@ static void orion5x_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
156 if (cause & (1 << pin)) { 156 if (cause & (1 << pin)) {
157 irq = gpio_to_irq(pin); 157 irq = gpio_to_irq(pin);
158 desc = irq_desc + irq; 158 desc = irq_desc + irq;
159 if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) { 159 if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
160 /* Swap polarity (race with GPIO line) */ 160 /* Swap polarity (race with GPIO line) */
161 u32 polarity = readl(GPIO_IN_POL); 161 u32 polarity = readl(GPIO_IN_POL);
162 polarity ^= 1 << pin; 162 polarity ^= 1 << pin;
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index 10ae62864269..2a46d27209c1 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -148,7 +148,7 @@ void __init rd88f5182_pci_preinit(void)
148 pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; 148 pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
149 if (gpio_request(pin, "PCI IntA") == 0) { 149 if (gpio_request(pin, "PCI IntA") == 0) {
150 if (gpio_direction_input(pin) == 0) { 150 if (gpio_direction_input(pin) == 0) {
151 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 151 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
152 } else { 152 } else {
153 printk(KERN_ERR "rd88f5182_pci_preinit faield to " 153 printk(KERN_ERR "rd88f5182_pci_preinit faield to "
154 "set_irq_type pin %d\n", pin); 154 "set_irq_type pin %d\n", pin);
@@ -161,7 +161,7 @@ void __init rd88f5182_pci_preinit(void)
161 pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; 161 pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
162 if (gpio_request(pin, "PCI IntB") == 0) { 162 if (gpio_request(pin, "PCI IntB") == 0) {
163 if (gpio_direction_input(pin) == 0) { 163 if (gpio_direction_input(pin) == 0) {
164 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 164 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
165 } else { 165 } else {
166 printk(KERN_ERR "rd88f5182_pci_preinit faield to " 166 printk(KERN_ERR "rd88f5182_pci_preinit faield to "
167 "set_irq_type pin %d\n", pin); 167 "set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index a9cef9703d5b..f270ada2def9 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -117,7 +117,7 @@ void __init qnap_ts209_pci_preinit(void)
117 pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN; 117 pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN;
118 if (gpio_request(pin, "PCI Int1") == 0) { 118 if (gpio_request(pin, "PCI Int1") == 0) {
119 if (gpio_direction_input(pin) == 0) { 119 if (gpio_direction_input(pin) == 0) {
120 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 120 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
121 } else { 121 } else {
122 printk(KERN_ERR "qnap_ts209_pci_preinit failed to " 122 printk(KERN_ERR "qnap_ts209_pci_preinit failed to "
123 "set_irq_type pin %d\n", pin); 123 "set_irq_type pin %d\n", pin);
@@ -131,7 +131,7 @@ void __init qnap_ts209_pci_preinit(void)
131 pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN; 131 pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN;
132 if (gpio_request(pin, "PCI Int2") == 0) { 132 if (gpio_request(pin, "PCI Int2") == 0) {
133 if (gpio_direction_input(pin) == 0) { 133 if (gpio_direction_input(pin) == 0) {
134 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 134 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
135 } else { 135 } else {
136 printk(KERN_ERR "qnap_ts209_pci_preinit failed " 136 printk(KERN_ERR "qnap_ts209_pci_preinit failed "
137 "to set_irq_type pin %d\n", pin); 137 "to set_irq_type pin %d\n", pin);