diff options
author | Andrew Lunn <andrew@lunn.ch> | 2011-05-15 07:32:48 -0400 |
---|---|---|
committer | Nicolas Pitre <nico@fluxnic.net> | 2011-05-16 15:10:50 -0400 |
commit | ee9627234dae8d1b8059b2ac39c961ee0932b803 (patch) | |
tree | 1a2dfea66908b45439d322729cb6e34a59330682 /arch/arm/mach-orion5x | |
parent | 5e00d3783dd362a34c9816bb582103c9833e4643 (diff) |
ARM: orion: Consolidate the XOR platform setup code.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Diffstat (limited to 'arch/arm/mach-orion5x')
-rw-r--r-- | arch/arm/mach-orion5x/common.c | 102 |
1 files changed, 5 insertions, 97 deletions
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index c26e6dbe489b..5c7e39164c5e 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
16 | #include <linux/dma-mapping.h> | ||
16 | #include <linux/serial_8250.h> | 17 | #include <linux/serial_8250.h> |
17 | #include <linux/mbus.h> | 18 | #include <linux/mbus.h> |
18 | #include <linux/mv643xx_i2c.h> | 19 | #include <linux/mv643xx_i2c.h> |
@@ -28,7 +29,6 @@ | |||
28 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
29 | #include <mach/orion5x.h> | 30 | #include <mach/orion5x.h> |
30 | #include <plat/ehci-orion.h> | 31 | #include <plat/ehci-orion.h> |
31 | #include <plat/mv_xor.h> | ||
32 | #include <plat/orion_nand.h> | 32 | #include <plat/orion_nand.h> |
33 | #include <plat/time.h> | 33 | #include <plat/time.h> |
34 | #include <plat/common.h> | 34 | #include <plat/common.h> |
@@ -239,104 +239,12 @@ void __init orion5x_uart1_init(void) | |||
239 | /***************************************************************************** | 239 | /***************************************************************************** |
240 | * XOR engine | 240 | * XOR engine |
241 | ****************************************************************************/ | 241 | ****************************************************************************/ |
242 | struct mv_xor_platform_shared_data orion5x_xor_shared_data = { | ||
243 | .dram = &orion5x_mbus_dram_info, | ||
244 | }; | ||
245 | |||
246 | static struct resource orion5x_xor_shared_resources[] = { | ||
247 | { | ||
248 | .name = "xor low", | ||
249 | .start = ORION5X_XOR_PHYS_BASE, | ||
250 | .end = ORION5X_XOR_PHYS_BASE + 0xff, | ||
251 | .flags = IORESOURCE_MEM, | ||
252 | }, { | ||
253 | .name = "xor high", | ||
254 | .start = ORION5X_XOR_PHYS_BASE + 0x200, | ||
255 | .end = ORION5X_XOR_PHYS_BASE + 0x2ff, | ||
256 | .flags = IORESOURCE_MEM, | ||
257 | }, | ||
258 | }; | ||
259 | |||
260 | static struct platform_device orion5x_xor_shared = { | ||
261 | .name = MV_XOR_SHARED_NAME, | ||
262 | .id = 0, | ||
263 | .dev = { | ||
264 | .platform_data = &orion5x_xor_shared_data, | ||
265 | }, | ||
266 | .num_resources = ARRAY_SIZE(orion5x_xor_shared_resources), | ||
267 | .resource = orion5x_xor_shared_resources, | ||
268 | }; | ||
269 | |||
270 | static u64 orion5x_xor_dmamask = DMA_BIT_MASK(32); | ||
271 | |||
272 | static struct resource orion5x_xor0_resources[] = { | ||
273 | [0] = { | ||
274 | .start = IRQ_ORION5X_XOR0, | ||
275 | .end = IRQ_ORION5X_XOR0, | ||
276 | .flags = IORESOURCE_IRQ, | ||
277 | }, | ||
278 | }; | ||
279 | |||
280 | static struct mv_xor_platform_data orion5x_xor0_data = { | ||
281 | .shared = &orion5x_xor_shared, | ||
282 | .hw_id = 0, | ||
283 | .pool_size = PAGE_SIZE, | ||
284 | }; | ||
285 | |||
286 | static struct platform_device orion5x_xor0_channel = { | ||
287 | .name = MV_XOR_NAME, | ||
288 | .id = 0, | ||
289 | .num_resources = ARRAY_SIZE(orion5x_xor0_resources), | ||
290 | .resource = orion5x_xor0_resources, | ||
291 | .dev = { | ||
292 | .dma_mask = &orion5x_xor_dmamask, | ||
293 | .coherent_dma_mask = DMA_BIT_MASK(64), | ||
294 | .platform_data = &orion5x_xor0_data, | ||
295 | }, | ||
296 | }; | ||
297 | |||
298 | static struct resource orion5x_xor1_resources[] = { | ||
299 | [0] = { | ||
300 | .start = IRQ_ORION5X_XOR1, | ||
301 | .end = IRQ_ORION5X_XOR1, | ||
302 | .flags = IORESOURCE_IRQ, | ||
303 | }, | ||
304 | }; | ||
305 | |||
306 | static struct mv_xor_platform_data orion5x_xor1_data = { | ||
307 | .shared = &orion5x_xor_shared, | ||
308 | .hw_id = 1, | ||
309 | .pool_size = PAGE_SIZE, | ||
310 | }; | ||
311 | |||
312 | static struct platform_device orion5x_xor1_channel = { | ||
313 | .name = MV_XOR_NAME, | ||
314 | .id = 1, | ||
315 | .num_resources = ARRAY_SIZE(orion5x_xor1_resources), | ||
316 | .resource = orion5x_xor1_resources, | ||
317 | .dev = { | ||
318 | .dma_mask = &orion5x_xor_dmamask, | ||
319 | .coherent_dma_mask = DMA_BIT_MASK(64), | ||
320 | .platform_data = &orion5x_xor1_data, | ||
321 | }, | ||
322 | }; | ||
323 | |||
324 | void __init orion5x_xor_init(void) | 242 | void __init orion5x_xor_init(void) |
325 | { | 243 | { |
326 | platform_device_register(&orion5x_xor_shared); | 244 | orion_xor0_init(&orion5x_mbus_dram_info, |
327 | 245 | ORION5X_XOR_PHYS_BASE, | |
328 | /* | 246 | ORION5X_XOR_PHYS_BASE + 0x200, |
329 | * two engines can't do memset simultaneously, this limitation | 247 | IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1); |
330 | * satisfied by removing memset support from one of the engines. | ||
331 | */ | ||
332 | dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask); | ||
333 | dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask); | ||
334 | platform_device_register(&orion5x_xor0_channel); | ||
335 | |||
336 | dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask); | ||
337 | dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask); | ||
338 | dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask); | ||
339 | platform_device_register(&orion5x_xor1_channel); | ||
340 | } | 248 | } |
341 | 249 | ||
342 | static struct resource orion5x_crypto_res[] = { | 250 | static struct resource orion5x_crypto_res[] = { |