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authorAndrew Lunn <andrew@lunn.ch>2012-09-28 10:12:46 -0400
committerArnd Bergmann <arnd@arndb.de>2012-09-28 16:04:48 -0400
commitac3524b7f5a6b9a744fb7ea19991355354c09afb (patch)
tree38ceeed0ba9a7d3bf33224ad99439767484d4593 /arch/arm/mach-orion5x
parent20ef52a8855fd5b8af229b701cced2629d029229 (diff)
ARM: Orion5x: ts78xx: Add IOMEM for virtual addresses.
Also convert logical or to + for register offsets from base addresses. This fixes a number of warnings currently seen in linux-next: warning: passing argument 2 of '__raw_writeb' makes pointer from interger without cast. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-orion5x')
-rw-r--r--arch/arm/mach-orion5x/ts78xx-setup.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index b4203277f3cd..b0727dcd1ef9 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -36,7 +36,7 @@
36 * FPGA - lives where the PCI bus would be at ORION5X_PCI_MEM_PHYS_BASE 36 * FPGA - lives where the PCI bus would be at ORION5X_PCI_MEM_PHYS_BASE
37 */ 37 */
38#define TS78XX_FPGA_REGS_PHYS_BASE 0xe8000000 38#define TS78XX_FPGA_REGS_PHYS_BASE 0xe8000000
39#define TS78XX_FPGA_REGS_VIRT_BASE 0xff900000 39#define TS78XX_FPGA_REGS_VIRT_BASE IOMEM(0xff900000)
40#define TS78XX_FPGA_REGS_SIZE SZ_1M 40#define TS78XX_FPGA_REGS_SIZE SZ_1M
41 41
42static struct ts78xx_fpga_data ts78xx_fpga = { 42static struct ts78xx_fpga_data ts78xx_fpga = {
@@ -50,7 +50,7 @@ static struct ts78xx_fpga_data ts78xx_fpga = {
50 ****************************************************************************/ 50 ****************************************************************************/
51static struct map_desc ts78xx_io_desc[] __initdata = { 51static struct map_desc ts78xx_io_desc[] __initdata = {
52 { 52 {
53 .virtual = TS78XX_FPGA_REGS_VIRT_BASE, 53 .virtual = (unsigned long)TS78XX_FPGA_REGS_VIRT_BASE,
54 .pfn = __phys_to_pfn(TS78XX_FPGA_REGS_PHYS_BASE), 54 .pfn = __phys_to_pfn(TS78XX_FPGA_REGS_PHYS_BASE),
55 .length = TS78XX_FPGA_REGS_SIZE, 55 .length = TS78XX_FPGA_REGS_SIZE,
56 .type = MT_DEVICE, 56 .type = MT_DEVICE,
@@ -80,8 +80,8 @@ static struct mv_sata_platform_data ts78xx_sata_data = {
80/***************************************************************************** 80/*****************************************************************************
81 * RTC M48T86 - nicked^Wborrowed from arch/arm/mach-ep93xx/ts72xx.c 81 * RTC M48T86 - nicked^Wborrowed from arch/arm/mach-ep93xx/ts72xx.c
82 ****************************************************************************/ 82 ****************************************************************************/
83#define TS_RTC_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x808) 83#define TS_RTC_CTRL (TS78XX_FPGA_REGS_VIRT_BASE + 0x808)
84#define TS_RTC_DATA (TS78XX_FPGA_REGS_VIRT_BASE | 0x80c) 84#define TS_RTC_DATA (TS78XX_FPGA_REGS_VIRT_BASE + 0x80c)
85 85
86static unsigned char ts78xx_ts_rtc_readbyte(unsigned long addr) 86static unsigned char ts78xx_ts_rtc_readbyte(unsigned long addr)
87{ 87{
@@ -162,8 +162,8 @@ static void ts78xx_ts_rtc_unload(void)
162/***************************************************************************** 162/*****************************************************************************
163 * NAND Flash 163 * NAND Flash
164 ****************************************************************************/ 164 ****************************************************************************/
165#define TS_NAND_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x800) /* VIRT */ 165#define TS_NAND_CTRL (TS78XX_FPGA_REGS_VIRT_BASE + 0x800) /* VIRT */
166#define TS_NAND_DATA (TS78XX_FPGA_REGS_PHYS_BASE | 0x804) /* PHYS */ 166#define TS_NAND_DATA (TS78XX_FPGA_REGS_PHYS_BASE + 0x804) /* PHYS */
167 167
168/* 168/*
169 * hardware specific access to control-lines 169 * hardware specific access to control-lines