diff options
author | Sebastian Andrzej Siewior <sebastian@breakpoint.cc> | 2009-05-07 16:59:24 -0400 |
---|---|---|
committer | Nicolas Pitre <nico@cam.org> | 2009-06-08 13:05:01 -0400 |
commit | 3a8f744169ebcb0064c46a755d9e3e27233f048a (patch) | |
tree | 0ce761a9bfb2f450030de62b4dd8e14525a860d4 /arch/arm/mach-orion5x/include | |
parent | 9ffbe87370403d6d5c4010f5b0f692f9d0715776 (diff) |
[ARM] orion5x: add sram support for crypto
The security accelerator which can act as a puppet player for the crypto
engine requires its commands in the sram. This patch adds support for the
phys mapping and creates a platform device for the actual driver.
[ nico: renamed device name from "mv,orion5x-crypto" to "mv_crypto"
so to match the module name and be more generic for Kirkwood use ]
Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/mach-orion5x/include')
-rw-r--r-- | arch/arm/mach-orion5x/include/mach/orion5x.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h index 377a773ae53f..2d8766570531 100644 --- a/arch/arm/mach-orion5x/include/mach/orion5x.h +++ b/arch/arm/mach-orion5x/include/mach/orion5x.h | |||
@@ -24,6 +24,7 @@ | |||
24 | * f1000000 on-chip peripheral registers | 24 | * f1000000 on-chip peripheral registers |
25 | * f2000000 PCIe I/O space | 25 | * f2000000 PCIe I/O space |
26 | * f2100000 PCI I/O space | 26 | * f2100000 PCI I/O space |
27 | * f2200000 SRAM dedicated for the crypto unit | ||
27 | * f4000000 device bus mappings (boot) | 28 | * f4000000 device bus mappings (boot) |
28 | * fa000000 device bus mappings (cs0) | 29 | * fa000000 device bus mappings (cs0) |
29 | * fa800000 device bus mappings (cs2) | 30 | * fa800000 device bus mappings (cs2) |
@@ -49,6 +50,9 @@ | |||
49 | #define ORION5X_PCI_IO_BUS_BASE 0x00100000 | 50 | #define ORION5X_PCI_IO_BUS_BASE 0x00100000 |
50 | #define ORION5X_PCI_IO_SIZE SZ_1M | 51 | #define ORION5X_PCI_IO_SIZE SZ_1M |
51 | 52 | ||
53 | #define ORION5X_SRAM_PHYS_BASE (0xf2200000) | ||
54 | #define ORION5X_SRAM_SIZE SZ_8K | ||
55 | |||
52 | /* Relevant only for Orion-1/Orion-NAS */ | 56 | /* Relevant only for Orion-1/Orion-NAS */ |
53 | #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 | 57 | #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 |
54 | #define ORION5X_PCIE_WA_VIRT_BASE 0xfe000000 | 58 | #define ORION5X_PCIE_WA_VIRT_BASE 0xfe000000 |
@@ -94,6 +98,8 @@ | |||
94 | #define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x80000) | 98 | #define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x80000) |
95 | #define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x80000) | 99 | #define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x80000) |
96 | 100 | ||
101 | #define ORION5X_CRYPTO_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x90000) | ||
102 | |||
97 | #define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0xa0000) | 103 | #define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0xa0000) |
98 | #define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0xa0000) | 104 | #define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0xa0000) |
99 | 105 | ||