diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-01-28 16:49:49 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-01-28 16:49:49 -0500 |
commit | bb04af0e2e5bcd8d1a5d7f7d5c704f7eb328f241 (patch) | |
tree | fd67625ba9758dceff28dfca39127d7f07dae981 /arch/arm/mach-orion/gpio.c | |
parent | 0affa456cb6da51a31a6dd76b3d8827f467f807d (diff) | |
parent | 0ff66f0c7a5f1f4f5a0d91341b6f71fd2a49f0fa (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (176 commits)
[ARM] 4795/1: S3C244X: Add armclk and setparent call
[ARM] 4794/1: S3C24XX: Comonise S3C2440 and S3C2442 clock code
[ARM] 4793/1: S3C24XX: Add IRQ->GPIO pin mapping function
[ARM] 4792/1: S3C24XX: Remove warnings from debug-macro.S
[ARM] 4791/1: S3C2412: Make fclk a parent of msysclk
[ARM] 4790/1: S3C2412: Fix parent selection for msysclk.
[ARM] 4789/1: S3C2412: Add missing CLKDIVN register values
[ARM] 4788/1: S3C24XX: Fix paramet to s3c2410_dma_ctrl if S3C2410_DMAF_AUTOSTART used.
[ARM] 4787/1: S3C24XX: s3c2410_dma_request() should return the allocated channel number
[ARM] 4786/1: S3C2412: Add SPI FIFO controll constants
[ARM] 4785/1: S3C24XX: Add _SHIFT definitions for S3C2410_BANKCON registers
[ARM] 4784/1: S3C24XX: Fix GPIO restore glitches
[ARM] 4783/1: S3C24XX: Add s3c2410_gpio_getpull()
[ARM] 4782/1: S3C24XX: Define FIQ_START for any FIQ users
[ARM] 4781/1: S3C24XX: DMA suspend and resume support
[ARM] 4780/1: S3C2412: Allow for seperate DMA channels for TX and RX
[ARM] 4779/1: S3C2412: Add s3c2412_gpio_set_sleepcfg() call
[ARM] 4778/1: S3C2412: Add armclk and init from DVS state
[ARM] 4777/1: S3C24XX: Ensure clk_set_rate() checks the set_rate method for the clk
[ARM] 4775/1: s3c2410: fix compilation error if only s3c2442 cpu is selected
...
Diffstat (limited to 'arch/arm/mach-orion/gpio.c')
-rw-r--r-- | arch/arm/mach-orion/gpio.c | 225 |
1 files changed, 225 insertions, 0 deletions
diff --git a/arch/arm/mach-orion/gpio.c b/arch/arm/mach-orion/gpio.c new file mode 100644 index 000000000000..d5f00c86d616 --- /dev/null +++ b/arch/arm/mach-orion/gpio.c | |||
@@ -0,0 +1,225 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion/gpio.c | ||
3 | * | ||
4 | * GPIO functions for Marvell Orion System On Chip | ||
5 | * | ||
6 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/module.h> | ||
16 | #include <linux/spinlock.h> | ||
17 | #include <linux/bitops.h> | ||
18 | #include <asm/gpio.h> | ||
19 | #include <asm/arch/orion.h> | ||
20 | #include "common.h" | ||
21 | |||
22 | static DEFINE_SPINLOCK(gpio_lock); | ||
23 | static unsigned long gpio_valid[BITS_TO_LONGS(GPIO_MAX)]; | ||
24 | static const char *gpio_label[GPIO_MAX]; /* non null for allocated GPIOs */ | ||
25 | |||
26 | void __init orion_gpio_set_valid_pins(u32 pins) | ||
27 | { | ||
28 | gpio_valid[0] = pins; | ||
29 | } | ||
30 | |||
31 | /* | ||
32 | * GENERIC_GPIO primitives | ||
33 | */ | ||
34 | int gpio_direction_input(unsigned pin) | ||
35 | { | ||
36 | unsigned long flags; | ||
37 | |||
38 | if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { | ||
39 | pr_debug("%s: invalid GPIO %d\n", __FUNCTION__, pin); | ||
40 | return -EINVAL; | ||
41 | } | ||
42 | |||
43 | spin_lock_irqsave(&gpio_lock, flags); | ||
44 | |||
45 | /* | ||
46 | * Some callers might have not used the gpio_request(), | ||
47 | * so flag this pin as requested now. | ||
48 | */ | ||
49 | if (!gpio_label[pin]) | ||
50 | gpio_label[pin] = "?"; | ||
51 | |||
52 | orion_setbits(GPIO_IO_CONF, 1 << pin); | ||
53 | |||
54 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
55 | return 0; | ||
56 | } | ||
57 | EXPORT_SYMBOL(gpio_direction_input); | ||
58 | |||
59 | int gpio_direction_output(unsigned pin, int value) | ||
60 | { | ||
61 | unsigned long flags; | ||
62 | int mask; | ||
63 | |||
64 | if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { | ||
65 | pr_debug("%s: invalid GPIO %d\n", __FUNCTION__, pin); | ||
66 | return -EINVAL; | ||
67 | } | ||
68 | |||
69 | spin_lock_irqsave(&gpio_lock, flags); | ||
70 | |||
71 | /* | ||
72 | * Some callers might have not used the gpio_request(), | ||
73 | * so flag this pin as requested now. | ||
74 | */ | ||
75 | if (!gpio_label[pin]) | ||
76 | gpio_label[pin] = "?"; | ||
77 | |||
78 | mask = 1 << pin; | ||
79 | orion_clrbits(GPIO_BLINK_EN, mask); | ||
80 | if (value) | ||
81 | orion_setbits(GPIO_OUT, mask); | ||
82 | else | ||
83 | orion_clrbits(GPIO_OUT, mask); | ||
84 | orion_clrbits(GPIO_IO_CONF, mask); | ||
85 | |||
86 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
87 | return 0; | ||
88 | } | ||
89 | EXPORT_SYMBOL(gpio_direction_output); | ||
90 | |||
91 | int gpio_get_value(unsigned pin) | ||
92 | { | ||
93 | int val, mask = 1 << pin; | ||
94 | |||
95 | if (orion_read(GPIO_IO_CONF) & mask) | ||
96 | val = orion_read(GPIO_DATA_IN) ^ orion_read(GPIO_IN_POL); | ||
97 | else | ||
98 | val = orion_read(GPIO_OUT); | ||
99 | |||
100 | return val & mask; | ||
101 | } | ||
102 | EXPORT_SYMBOL(gpio_get_value); | ||
103 | |||
104 | void gpio_set_value(unsigned pin, int value) | ||
105 | { | ||
106 | unsigned long flags; | ||
107 | int mask = 1 << pin; | ||
108 | |||
109 | spin_lock_irqsave(&gpio_lock, flags); | ||
110 | |||
111 | orion_clrbits(GPIO_BLINK_EN, mask); | ||
112 | if (value) | ||
113 | orion_setbits(GPIO_OUT, mask); | ||
114 | else | ||
115 | orion_clrbits(GPIO_OUT, mask); | ||
116 | |||
117 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
118 | } | ||
119 | EXPORT_SYMBOL(gpio_set_value); | ||
120 | |||
121 | void orion_gpio_set_blink(unsigned pin, int blink) | ||
122 | { | ||
123 | unsigned long flags; | ||
124 | int mask = 1 << pin; | ||
125 | |||
126 | spin_lock_irqsave(&gpio_lock, flags); | ||
127 | |||
128 | orion_clrbits(GPIO_OUT, mask); | ||
129 | if (blink) | ||
130 | orion_setbits(GPIO_BLINK_EN, mask); | ||
131 | else | ||
132 | orion_clrbits(GPIO_BLINK_EN, mask); | ||
133 | |||
134 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
135 | } | ||
136 | EXPORT_SYMBOL(orion_gpio_set_blink); | ||
137 | |||
138 | int gpio_request(unsigned pin, const char *label) | ||
139 | { | ||
140 | int ret = 0; | ||
141 | unsigned long flags; | ||
142 | |||
143 | if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { | ||
144 | pr_debug("%s: invalid GPIO %d\n", __FUNCTION__, pin); | ||
145 | return -EINVAL; | ||
146 | } | ||
147 | |||
148 | spin_lock_irqsave(&gpio_lock, flags); | ||
149 | |||
150 | if (gpio_label[pin]) { | ||
151 | pr_debug("%s: GPIO %d already used as %s\n", | ||
152 | __FUNCTION__, pin, gpio_label[pin]); | ||
153 | ret = -EBUSY; | ||
154 | } else | ||
155 | gpio_label[pin] = label ? label : "?"; | ||
156 | |||
157 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
158 | return ret; | ||
159 | } | ||
160 | EXPORT_SYMBOL(gpio_request); | ||
161 | |||
162 | void gpio_free(unsigned pin) | ||
163 | { | ||
164 | if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { | ||
165 | pr_debug("%s: invalid GPIO %d\n", __FUNCTION__, pin); | ||
166 | return; | ||
167 | } | ||
168 | |||
169 | if (!gpio_label[pin]) | ||
170 | pr_warning("%s: GPIO %d already freed\n", __FUNCTION__, pin); | ||
171 | else | ||
172 | gpio_label[pin] = NULL; | ||
173 | } | ||
174 | EXPORT_SYMBOL(gpio_free); | ||
175 | |||
176 | /* Debug helper */ | ||
177 | void gpio_display(void) | ||
178 | { | ||
179 | int i; | ||
180 | |||
181 | for (i = 0; i < GPIO_MAX; i++) { | ||
182 | printk(KERN_DEBUG "Pin-%d: ", i); | ||
183 | |||
184 | if (!test_bit(i, gpio_valid)) { | ||
185 | printk("non-GPIO\n"); | ||
186 | } else if (!gpio_label[i]) { | ||
187 | printk("GPIO, free\n"); | ||
188 | } else { | ||
189 | printk("GPIO, used by %s, ", gpio_label[i]); | ||
190 | if (orion_read(GPIO_IO_CONF) & (1 << i)) { | ||
191 | printk("input, active %s, level %s, edge %s\n", | ||
192 | ((orion_read(GPIO_IN_POL) >> i) & 1) ? "low" : "high", | ||
193 | ((orion_read(GPIO_LEVEL_MASK) >> i) & 1) ? "enabled" : "masked", | ||
194 | ((orion_read(GPIO_EDGE_MASK) >> i) & 1) ? "enabled" : "masked"); | ||
195 | } else { | ||
196 | printk("output, val=%d\n", (orion_read(GPIO_OUT) >> i) & 1); | ||
197 | } | ||
198 | } | ||
199 | } | ||
200 | |||
201 | printk(KERN_DEBUG "MPP_0_7_CTRL (0x%08x) = 0x%08x\n", | ||
202 | MPP_0_7_CTRL, orion_read(MPP_0_7_CTRL)); | ||
203 | printk(KERN_DEBUG "MPP_8_15_CTRL (0x%08x) = 0x%08x\n", | ||
204 | MPP_8_15_CTRL, orion_read(MPP_8_15_CTRL)); | ||
205 | printk(KERN_DEBUG "MPP_16_19_CTRL (0x%08x) = 0x%08x\n", | ||
206 | MPP_16_19_CTRL, orion_read(MPP_16_19_CTRL)); | ||
207 | printk(KERN_DEBUG "MPP_DEV_CTRL (0x%08x) = 0x%08x\n", | ||
208 | MPP_DEV_CTRL, orion_read(MPP_DEV_CTRL)); | ||
209 | printk(KERN_DEBUG "GPIO_OUT (0x%08x) = 0x%08x\n", | ||
210 | GPIO_OUT, orion_read(GPIO_OUT)); | ||
211 | printk(KERN_DEBUG "GPIO_IO_CONF (0x%08x) = 0x%08x\n", | ||
212 | GPIO_IO_CONF, orion_read(GPIO_IO_CONF)); | ||
213 | printk(KERN_DEBUG "GPIO_BLINK_EN (0x%08x) = 0x%08x\n", | ||
214 | GPIO_BLINK_EN, orion_read(GPIO_BLINK_EN)); | ||
215 | printk(KERN_DEBUG "GPIO_IN_POL (0x%08x) = 0x%08x\n", | ||
216 | GPIO_IN_POL, orion_read(GPIO_IN_POL)); | ||
217 | printk(KERN_DEBUG "GPIO_DATA_IN (0x%08x) = 0x%08x\n", | ||
218 | GPIO_DATA_IN, orion_read(GPIO_DATA_IN)); | ||
219 | printk(KERN_DEBUG "GPIO_LEVEL_MASK (0x%08x) = 0x%08x\n", | ||
220 | GPIO_LEVEL_MASK, orion_read(GPIO_LEVEL_MASK)); | ||
221 | printk(KERN_DEBUG "GPIO_EDGE_CAUSE (0x%08x) = 0x%08x\n", | ||
222 | GPIO_EDGE_CAUSE, orion_read(GPIO_EDGE_CAUSE)); | ||
223 | printk(KERN_DEBUG "GPIO_EDGE_MASK (0x%08x) = 0x%08x\n", | ||
224 | GPIO_EDGE_MASK, orion_read(GPIO_EDGE_MASK)); | ||
225 | } | ||