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authorLennert Buytenhek <buytenh@wantstofly.org>2008-03-27 14:51:41 -0400
committerNicolas Pitre <nico@marvell.com>2008-03-27 14:51:41 -0400
commit159ffb3a04f6bc619643af680df406faafd0199d (patch)
tree45d76928836065a3207c15e5bc2037b186213ace /arch/arm/mach-orion/addr-map.c
parentd50c60a87a95a42f1bc984150d3eebc77a0b0c14 (diff)
Orion: general cleanup
Various Orion cleanups: - Unify GPL license banner format across all files. - Unify naming of .h double inclusion guard preprocessor macros. - Unify spelling of "PCIe" (variants seen: PCIE, PCIe, PCI-EX.) - Various typo fixes. - Remove __init attributes from prototypes declared in headers. - Remove trailing comments from #endif statements. - Mark a couple of locally-used-only structs static. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/mach-orion/addr-map.c')
-rw-r--r--arch/arm/mach-orion/addr-map.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-orion/addr-map.c b/arch/arm/mach-orion/addr-map.c
index ecca987b57e9..738de617e3c7 100644
--- a/arch/arm/mach-orion/addr-map.c
+++ b/arch/arm/mach-orion/addr-map.c
@@ -5,8 +5,8 @@
5 * 5 *
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com> 6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
7 * 7 *
8 * This file is licensed under the terms of the GNU General Public 8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any 9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied. 10 * warranty of any kind, whether express or implied.
11 */ 11 */
12 12
@@ -45,9 +45,9 @@
45 * Generic Address Decode Windows bit settings 45 * Generic Address Decode Windows bit settings
46 */ 46 */
47#define TARGET_DDR 0 47#define TARGET_DDR 0
48#define TARGET_DEV_BUS 1
48#define TARGET_PCI 3 49#define TARGET_PCI 3
49#define TARGET_PCIE 4 50#define TARGET_PCIE 4
50#define TARGET_DEV_BUS 1
51#define ATTR_DDR_CS(n) (((n) ==0) ? 0xe : \ 51#define ATTR_DDR_CS(n) (((n) ==0) ? 0xe : \
52 ((n) == 1) ? 0xd : \ 52 ((n) == 1) ? 0xd : \
53 ((n) == 2) ? 0xb : \ 53 ((n) == 2) ? 0xb : \
@@ -64,7 +64,7 @@
64#define WIN_EN 1 64#define WIN_EN 1
65 65
66/* 66/*
67 * Helpers to get DDR banks info 67 * Helpers to get DDR bank info
68 */ 68 */
69#define DDR_BASE_CS(n) ORION_DDR_REG(0x1500 + ((n) * 8)) 69#define DDR_BASE_CS(n) ORION_DDR_REG(0x1500 + ((n) * 8))
70#define DDR_SIZE_CS(n) ORION_DDR_REG(0x1504 + ((n) * 8)) 70#define DDR_SIZE_CS(n) ORION_DDR_REG(0x1504 + ((n) * 8))