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authorOlof Johansson <olof@lixom.net>2014-08-09 11:23:27 -0400
committerOlof Johansson <olof@lixom.net>2014-08-09 11:23:27 -0400
commitbb7aedff3f98c5b842f787f70d99370da197f76b (patch)
treec2c00d17410f5d60d122895639aacbe7ef2dea56 /arch/arm/mach-omap2
parentc9c32c5049b8a36919968dbfdf08bbeda0c5e381 (diff)
parentae21e6180a03c147514c606b4e649690e0cbd40e (diff)
Merge tag 'omap-for-v3.17/soc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "few omap fixes for v3.17 merge window" from Tony Lindgren: Few fixes for the v3.17 merge window: - Fix for DPLL rate rounding - Fix for omap3 ES3.1.2 suspend - Few coding style fixes * tag 'omap-for-v3.17/soc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP3: Fix coding style problems in arch/arm/mach-omap2/control.c ARM: OMAP3: Fix choice of omap3_restore_es function in OMAP34XX rev3.1.2 case. ARM: OMAP2+: clock: allow omap2_dpll_round_rate() to round to next-lowest rate Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c28
-rw-r--r--arch/arm/mach-omap2/control.c6
-rw-r--r--arch/arm/mach-omap2/dpll3xxx.c13
3 files changed, 35 insertions, 12 deletions
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index b2ff6cd7ca9f..f251a14cbf16 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -285,10 +285,13 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
285{ 285{
286 struct clk_hw_omap *clk = to_clk_hw_omap(hw); 286 struct clk_hw_omap *clk = to_clk_hw_omap(hw);
287 int m, n, r, scaled_max_m; 287 int m, n, r, scaled_max_m;
288 int min_delta_m = INT_MAX, min_delta_n = INT_MAX;
288 unsigned long scaled_rt_rp; 289 unsigned long scaled_rt_rp;
289 unsigned long new_rate = 0; 290 unsigned long new_rate = 0;
290 struct dpll_data *dd; 291 struct dpll_data *dd;
291 unsigned long ref_rate; 292 unsigned long ref_rate;
293 long delta;
294 long prev_min_delta = LONG_MAX;
292 const char *clk_name; 295 const char *clk_name;
293 296
294 if (!clk || !clk->dpll_data) 297 if (!clk || !clk->dpll_data)
@@ -334,23 +337,34 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
334 if (r == DPLL_MULT_UNDERFLOW) 337 if (r == DPLL_MULT_UNDERFLOW)
335 continue; 338 continue;
336 339
340 /* skip rates above our target rate */
341 delta = target_rate - new_rate;
342 if (delta < 0)
343 continue;
344
345 if (delta < prev_min_delta) {
346 prev_min_delta = delta;
347 min_delta_m = m;
348 min_delta_n = n;
349 }
350
337 pr_debug("clock: %s: m = %d: n = %d: new_rate = %lu\n", 351 pr_debug("clock: %s: m = %d: n = %d: new_rate = %lu\n",
338 clk_name, m, n, new_rate); 352 clk_name, m, n, new_rate);
339 353
340 if (target_rate == new_rate) { 354 if (delta == 0)
341 dd->last_rounded_m = m;
342 dd->last_rounded_n = n;
343 dd->last_rounded_rate = target_rate;
344 break; 355 break;
345 }
346 } 356 }
347 357
348 if (target_rate != new_rate) { 358 if (prev_min_delta == LONG_MAX) {
349 pr_debug("clock: %s: cannot round to rate %lu\n", 359 pr_debug("clock: %s: cannot round to rate %lu\n",
350 clk_name, target_rate); 360 clk_name, target_rate);
351 return ~0; 361 return ~0;
352 } 362 }
353 363
354 return target_rate; 364 dd->last_rounded_m = min_delta_m;
365 dd->last_rounded_n = min_delta_n;
366 dd->last_rounded_rate = target_rate - prev_min_delta;
367
368 return dd->last_rounded_rate;
355} 369}
356 370
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index f4796c002070..da041b4ab29c 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -280,6 +280,7 @@ void omap3_clear_scratchpad_contents(void)
280 u32 max_offset = OMAP343X_SCRATCHPAD_ROM_OFFSET; 280 u32 max_offset = OMAP343X_SCRATCHPAD_ROM_OFFSET;
281 void __iomem *v_addr; 281 void __iomem *v_addr;
282 u32 offset = 0; 282 u32 offset = 0;
283
283 v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM); 284 v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM);
284 if (omap3xxx_prm_clear_global_cold_reset()) { 285 if (omap3xxx_prm_clear_global_cold_reset()) {
285 for ( ; offset <= max_offset; offset += 0x4) 286 for ( ; offset <= max_offset; offset += 0x4)
@@ -309,7 +310,8 @@ void omap3_save_scratchpad_contents(void)
309 scratchpad_contents.public_restore_ptr = 310 scratchpad_contents.public_restore_ptr =
310 virt_to_phys(omap3_restore_3630); 311 virt_to_phys(omap3_restore_3630);
311 else if (omap_rev() != OMAP3430_REV_ES3_0 && 312 else if (omap_rev() != OMAP3430_REV_ES3_0 &&
312 omap_rev() != OMAP3430_REV_ES3_1) 313 omap_rev() != OMAP3430_REV_ES3_1 &&
314 omap_rev() != OMAP3430_REV_ES3_1_2)
313 scratchpad_contents.public_restore_ptr = 315 scratchpad_contents.public_restore_ptr =
314 virt_to_phys(omap3_restore); 316 virt_to_phys(omap3_restore);
315 else 317 else
@@ -463,7 +465,6 @@ void omap3_control_save_context(void)
463 control_context.csi = omap_ctrl_readl(OMAP343X_CONTROL_CSI); 465 control_context.csi = omap_ctrl_readl(OMAP343X_CONTROL_CSI);
464 control_context.padconf_sys_nirq = 466 control_context.padconf_sys_nirq =
465 omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_SYSNIRQ); 467 omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_SYSNIRQ);
466 return;
467} 468}
468 469
469void omap3_control_restore_context(void) 470void omap3_control_restore_context(void)
@@ -521,7 +522,6 @@ void omap3_control_restore_context(void)
521 omap_ctrl_writel(control_context.csi, OMAP343X_CONTROL_CSI); 522 omap_ctrl_writel(control_context.csi, OMAP343X_CONTROL_CSI);
522 omap_ctrl_writel(control_context.padconf_sys_nirq, 523 omap_ctrl_writel(control_context.padconf_sys_nirq,
523 OMAP343X_CONTROL_PADCONF_SYSNIRQ); 524 OMAP343X_CONTROL_PADCONF_SYSNIRQ);
524 return;
525} 525}
526 526
527void omap3630_ctrl_disable_rta(void) 527void omap3630_ctrl_disable_rta(void)
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index cd5f3a0b97bd..ac3d789ac3cd 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -475,6 +475,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
475{ 475{
476 struct clk_hw_omap *clk = to_clk_hw_omap(hw); 476 struct clk_hw_omap *clk = to_clk_hw_omap(hw);
477 struct clk *new_parent = NULL; 477 struct clk *new_parent = NULL;
478 unsigned long rrate;
478 u16 freqsel = 0; 479 u16 freqsel = 0;
479 struct dpll_data *dd; 480 struct dpll_data *dd;
480 int ret; 481 int ret;
@@ -502,8 +503,16 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
502 __clk_prepare(dd->clk_ref); 503 __clk_prepare(dd->clk_ref);
503 clk_enable(dd->clk_ref); 504 clk_enable(dd->clk_ref);
504 505
505 if (dd->last_rounded_rate != rate) 506 /* XXX this check is probably pointless in the CCF context */
506 rate = __clk_round_rate(hw->clk, rate); 507 if (dd->last_rounded_rate != rate) {
508 rrate = __clk_round_rate(hw->clk, rate);
509 if (rrate != rate) {
510 pr_warn("%s: %s: final rate %lu does not match desired rate %lu\n",
511 __func__, __clk_get_name(hw->clk),
512 rrate, rate);
513 rate = rrate;
514 }
515 }
507 516
508 if (dd->last_rounded_rate == 0) 517 if (dd->last_rounded_rate == 0)
509 return -EINVAL; 518 return -EINVAL;