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authorAida Mynzhasova <aida.mynzhasova@skitlab.ru>2013-05-30 06:21:01 -0400
committerTony Lindgren <tony@atomide.com>2013-06-18 04:17:01 -0400
commita5f93d9dad9c203e0715206ef60a505013561df6 (patch)
treea90e027bbb5e6a65bf5c5aacce2616438e3c0969 /arch/arm/mach-omap2
parentbb256f803c9f620eb5a7d1c02e53360392cffbdd (diff)
ARM: OMAP2: TI81XX: id: Add cpu id for TI816x ES2.0 and ES2.1
Currently omap3xxx_check_revision() detects ES1.0 and ES1.1 only, this patch extends it by adding ES2.0 and ES2.1 versions support. Signed-off-by: Aida Mynzhasova <aida.mynzhasova@skitlab.ru> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/id.c11
-rw-r--r--arch/arm/mach-omap2/soc.h2
2 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 74f71abcd50e..9e5c7cb4a81a 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -407,11 +407,18 @@ void __init omap3xxx_check_revision(void)
407 cpu_rev = "1.0"; 407 cpu_rev = "1.0";
408 break; 408 break;
409 case 1: 409 case 1:
410 /* FALLTHROUGH */
411 default:
412 omap_revision = TI8168_REV_ES1_1; 410 omap_revision = TI8168_REV_ES1_1;
413 cpu_rev = "1.1"; 411 cpu_rev = "1.1";
414 break; 412 break;
413 case 2:
414 omap_revision = TI8168_REV_ES2_0;
415 cpu_rev = "2.0";
416 break;
417 case 3:
418 /* FALLTHROUGH */
419 default:
420 omap_revision = TI8168_REV_ES2_1;
421 cpu_rev = "2.1";
415 } 422 }
416 break; 423 break;
417 case 0xb944: 424 case 0xb944:
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index 3cefc492b758..9cd9414a0afd 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -403,6 +403,8 @@ IS_OMAP_TYPE(3430, 0x3430)
403#define TI816X_CLASS 0x81600034 403#define TI816X_CLASS 0x81600034
404#define TI8168_REV_ES1_0 TI816X_CLASS 404#define TI8168_REV_ES1_0 TI816X_CLASS
405#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8)) 405#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
406#define TI8168_REV_ES2_0 (TI816X_CLASS | (0x2 << 8))
407#define TI8168_REV_ES2_1 (TI816X_CLASS | (0x3 << 8))
406 408
407#define TI814X_CLASS 0x81400034 409#define TI814X_CLASS 0x81400034
408#define TI8148_REV_ES1_0 TI814X_CLASS 410#define TI8148_REV_ES1_0 TI814X_CLASS