diff options
author | R Sricharan <r.sricharan@ti.com> | 2012-05-08 01:55:22 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2012-05-08 01:55:22 -0400 |
commit | 610eb8c218ef214594295776275855640d37ab2a (patch) | |
tree | 861e9a1c103cd40e1cd5321be5c7e4dc033eac2c /arch/arm/mach-omap2 | |
parent | 444b3df6b387e6dd55cd9dbc8924e111792d2c42 (diff) |
ARM: OMAP4+: Add prm and cm base init function.
Instead of statically defining seperate arrays for every OMAP4+ archs,
have a generic init function to populate the arrays. This avoids the
need for creating new array for every arch added in the future that
reuses the prm and cm registers read/write code.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/cminst44xx.c | 28 | ||||
-rw-r--r-- | arch/arm/mach-omap2/common.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/common.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prcm-common.h | 13 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prcm.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prminst44xx.c | 27 |
6 files changed, 57 insertions, 21 deletions
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index bd8810c3753f..8c86d294b1a3 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include "prcm44xx.h" | 32 | #include "prcm44xx.h" |
33 | #include "prm44xx.h" | 33 | #include "prm44xx.h" |
34 | #include "prcm_mpu44xx.h" | 34 | #include "prcm_mpu44xx.h" |
35 | #include "prcm-common.h" | ||
35 | 36 | ||
36 | /* | 37 | /* |
37 | * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield: | 38 | * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield: |
@@ -49,14 +50,21 @@ | |||
49 | #define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2 | 50 | #define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2 |
50 | #define CLKCTRL_IDLEST_DISABLED 0x3 | 51 | #define CLKCTRL_IDLEST_DISABLED 0x3 |
51 | 52 | ||
52 | static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { | 53 | static void __iomem *_cm_bases[OMAP4_MAX_PRCM_PARTITIONS]; |
53 | [OMAP4430_INVALID_PRCM_PARTITION] = 0, | 54 | |
54 | [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE, | 55 | /** |
55 | [OMAP4430_CM1_PARTITION] = OMAP4430_CM1_BASE, | 56 | * omap_cm_base_init - Populates the cm partitions |
56 | [OMAP4430_CM2_PARTITION] = OMAP4430_CM2_BASE, | 57 | * |
57 | [OMAP4430_SCRM_PARTITION] = 0, | 58 | * Populates the base addresses of the _cm_bases |
58 | [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE, | 59 | * array used for read/write of cm module registers. |
59 | }; | 60 | */ |
61 | void omap_cm_base_init(void) | ||
62 | { | ||
63 | _cm_bases[OMAP4430_PRM_PARTITION] = prm_base; | ||
64 | _cm_bases[OMAP4430_CM1_PARTITION] = cm_base; | ||
65 | _cm_bases[OMAP4430_CM2_PARTITION] = cm2_base; | ||
66 | _cm_bases[OMAP4430_PRCM_MPU_PARTITION] = prcm_mpu_base; | ||
67 | } | ||
60 | 68 | ||
61 | /* Private functions */ | 69 | /* Private functions */ |
62 | 70 | ||
@@ -106,7 +114,7 @@ u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx) | |||
106 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || | 114 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || |
107 | part == OMAP4430_INVALID_PRCM_PARTITION || | 115 | part == OMAP4430_INVALID_PRCM_PARTITION || |
108 | !_cm_bases[part]); | 116 | !_cm_bases[part]); |
109 | return __raw_readl(OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx)); | 117 | return __raw_readl(_cm_bases[part] + inst + idx); |
110 | } | 118 | } |
111 | 119 | ||
112 | /* Write into a register in a CM instance */ | 120 | /* Write into a register in a CM instance */ |
@@ -115,7 +123,7 @@ void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) | |||
115 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || | 123 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || |
116 | part == OMAP4430_INVALID_PRCM_PARTITION || | 124 | part == OMAP4430_INVALID_PRCM_PARTITION || |
117 | !_cm_bases[part]); | 125 | !_cm_bases[part]); |
118 | __raw_writel(val, OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx)); | 126 | __raw_writel(val, _cm_bases[part] + inst + idx); |
119 | } | 127 | } |
120 | 128 | ||
121 | /* Read-modify-write a register in CM1. Caller must lock */ | 129 | /* Read-modify-write a register in CM1. Caller must lock */ |
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index 1549c11000d3..8a6953a34fe2 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c | |||
@@ -166,6 +166,7 @@ static struct omap_globals omap4_globals = { | |||
166 | .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE), | 166 | .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE), |
167 | .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), | 167 | .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), |
168 | .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE), | 168 | .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE), |
169 | .prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE), | ||
169 | }; | 170 | }; |
170 | 171 | ||
171 | void __init omap2_set_globals_443x(void) | 172 | void __init omap2_set_globals_443x(void) |
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 57da7f406e28..0672fc54b30f 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h | |||
@@ -111,6 +111,7 @@ struct omap_globals { | |||
111 | void __iomem *prm; /* Power and Reset Management */ | 111 | void __iomem *prm; /* Power and Reset Management */ |
112 | void __iomem *cm; /* Clock Management */ | 112 | void __iomem *cm; /* Clock Management */ |
113 | void __iomem *cm2; | 113 | void __iomem *cm2; |
114 | void __iomem *prcm_mpu; | ||
114 | }; | 115 | }; |
115 | 116 | ||
116 | void omap2_set_globals_242x(void); | 117 | void omap2_set_globals_242x(void); |
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 29955d55064f..6da3ba483ad1 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h | |||
@@ -414,6 +414,19 @@ | |||
414 | extern void __iomem *prm_base; | 414 | extern void __iomem *prm_base; |
415 | extern void __iomem *cm_base; | 415 | extern void __iomem *cm_base; |
416 | extern void __iomem *cm2_base; | 416 | extern void __iomem *cm2_base; |
417 | extern void __iomem *prcm_mpu_base; | ||
418 | |||
419 | #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_ARCH_OMAP5) | ||
420 | extern void omap_prm_base_init(void); | ||
421 | extern void omap_cm_base_init(void); | ||
422 | #else | ||
423 | static inline void omap_prm_base_init(void) | ||
424 | { | ||
425 | } | ||
426 | static inline void omap_cm_base_init(void) | ||
427 | { | ||
428 | } | ||
429 | #endif | ||
417 | 430 | ||
418 | /** | 431 | /** |
419 | * struct omap_prcm_irq - describes a PRCM interrupt bit | 432 | * struct omap_prcm_irq - describes a PRCM interrupt bit |
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 626acfad7190..480f40a5ee42 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c | |||
@@ -42,6 +42,7 @@ | |||
42 | void __iomem *prm_base; | 42 | void __iomem *prm_base; |
43 | void __iomem *cm_base; | 43 | void __iomem *cm_base; |
44 | void __iomem *cm2_base; | 44 | void __iomem *cm2_base; |
45 | void __iomem *prcm_mpu_base; | ||
45 | 46 | ||
46 | #define MAX_MODULE_ENABLE_WAIT 100000 | 47 | #define MAX_MODULE_ENABLE_WAIT 100000 |
47 | 48 | ||
@@ -155,4 +156,11 @@ void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) | |||
155 | cm_base = omap2_globals->cm; | 156 | cm_base = omap2_globals->cm; |
156 | if (omap2_globals->cm2) | 157 | if (omap2_globals->cm2) |
157 | cm2_base = omap2_globals->cm2; | 158 | cm2_base = omap2_globals->cm2; |
159 | if (omap2_globals->prcm_mpu) | ||
160 | prcm_mpu_base = omap2_globals->prcm_mpu; | ||
161 | |||
162 | if (cpu_is_omap44xx()) { | ||
163 | omap_prm_base_init(); | ||
164 | omap_cm_base_init(); | ||
165 | } | ||
158 | } | 166 | } |
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c index 9b3898a3ac9b..c12320c0ae95 100644 --- a/arch/arm/mach-omap2/prminst44xx.c +++ b/arch/arm/mach-omap2/prminst44xx.c | |||
@@ -18,20 +18,26 @@ | |||
18 | 18 | ||
19 | #include "iomap.h" | 19 | #include "iomap.h" |
20 | #include "common.h" | 20 | #include "common.h" |
21 | #include "prcm-common.h" | ||
21 | #include "prm44xx.h" | 22 | #include "prm44xx.h" |
22 | #include "prminst44xx.h" | 23 | #include "prminst44xx.h" |
23 | #include "prm-regbits-44xx.h" | 24 | #include "prm-regbits-44xx.h" |
24 | #include "prcm44xx.h" | 25 | #include "prcm44xx.h" |
25 | #include "prcm_mpu44xx.h" | 26 | #include "prcm_mpu44xx.h" |
26 | 27 | ||
27 | static u32 _prm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { | 28 | static void __iomem *_prm_bases[OMAP4_MAX_PRCM_PARTITIONS]; |
28 | [OMAP4430_INVALID_PRCM_PARTITION] = 0, | 29 | |
29 | [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE, | 30 | /** |
30 | [OMAP4430_CM1_PARTITION] = 0, | 31 | * omap_prm_base_init - Populates the prm partitions |
31 | [OMAP4430_CM2_PARTITION] = 0, | 32 | * |
32 | [OMAP4430_SCRM_PARTITION] = 0, | 33 | * Populates the base addresses of the _prm_bases |
33 | [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE, | 34 | * array used for read/write of prm module registers. |
34 | }; | 35 | */ |
36 | void omap_prm_base_init(void) | ||
37 | { | ||
38 | _prm_bases[OMAP4430_PRM_PARTITION] = prm_base; | ||
39 | _prm_bases[OMAP4430_PRCM_MPU_PARTITION] = prcm_mpu_base; | ||
40 | } | ||
35 | 41 | ||
36 | /* Read a register in a PRM instance */ | 42 | /* Read a register in a PRM instance */ |
37 | u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx) | 43 | u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx) |
@@ -39,8 +45,7 @@ u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx) | |||
39 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || | 45 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || |
40 | part == OMAP4430_INVALID_PRCM_PARTITION || | 46 | part == OMAP4430_INVALID_PRCM_PARTITION || |
41 | !_prm_bases[part]); | 47 | !_prm_bases[part]); |
42 | return __raw_readl(OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst + | 48 | return __raw_readl(_prm_bases[part] + inst + idx); |
43 | idx)); | ||
44 | } | 49 | } |
45 | 50 | ||
46 | /* Write into a register in a PRM instance */ | 51 | /* Write into a register in a PRM instance */ |
@@ -49,7 +54,7 @@ void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) | |||
49 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || | 54 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || |
50 | part == OMAP4430_INVALID_PRCM_PARTITION || | 55 | part == OMAP4430_INVALID_PRCM_PARTITION || |
51 | !_prm_bases[part]); | 56 | !_prm_bases[part]); |
52 | __raw_writel(val, OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst + idx)); | 57 | __raw_writel(val, _prm_bases[part] + inst + idx); |
53 | } | 58 | } |
54 | 59 | ||
55 | /* Read-modify-write a register in PRM. Caller must lock */ | 60 | /* Read-modify-write a register in PRM. Caller must lock */ |