diff options
author | Rajendra Nayak <rnayak@ti.com> | 2009-12-08 20:24:49 -0500 |
---|---|---|
committer | paul <paul@twilight.(none)> | 2009-12-11 19:00:45 -0500 |
commit | 77772d5f7dc3e329f916403ac1199615e7bab089 (patch) | |
tree | b3f5a7697634cf1fee112f645e490bd634c0c6ca /arch/arm/mach-omap2 | |
parent | 9ef89150ea118fabc1b93f6891ba58417e4260ff (diff) |
ARM: OMAP4: PM: PRM/CM module offsets for OMAP4
This patch adds the offsets for new modules in PRM
and CM for OMAP4
These are autogenerated using a python script (gen_prcm44xx_h.py)
developed by Paul Walmsley and Benoit Cousson.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/prcm-common.h | 67 |
1 files changed, 65 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index cb1ae84e0925..4f1b7361df99 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h | |||
@@ -4,10 +4,12 @@ | |||
4 | /* | 4 | /* |
5 | * OMAP2/3 PRCM base and module definitions | 5 | * OMAP2/3 PRCM base and module definitions |
6 | * | 6 | * |
7 | * Copyright (C) 2007-2008 Texas Instruments, Inc. | 7 | * Copyright (C) 2007-2009 Texas Instruments, Inc. |
8 | * Copyright (C) 2007-2008 Nokia Corporation | 8 | * Copyright (C) 2007-2009 Nokia Corporation |
9 | * | 9 | * |
10 | * Written by Paul Walmsley | 10 | * Written by Paul Walmsley |
11 | * OMAP4 defines in this file are automatically generated from the OMAP hardware | ||
12 | * databases. | ||
11 | * | 13 | * |
12 | * This program is free software; you can redistribute it and/or modify | 14 | * This program is free software; you can redistribute it and/or modify |
13 | * it under the terms of the GNU General Public License version 2 as | 15 | * it under the terms of the GNU General Public License version 2 as |
@@ -49,6 +51,67 @@ | |||
49 | #define OMAP3430_NEON_MOD 0xb00 | 51 | #define OMAP3430_NEON_MOD 0xb00 |
50 | #define OMAP3430ES2_USBHOST_MOD 0xc00 | 52 | #define OMAP3430ES2_USBHOST_MOD 0xc00 |
51 | 53 | ||
54 | /* OMAP44XX specific module offsets */ | ||
55 | |||
56 | /* CM1 instances */ | ||
57 | |||
58 | #define OMAP4430_CM1_OCP_SOCKET_MOD 0x0000 | ||
59 | #define OMAP4430_CM1_CKGEN_MOD 0x0100 | ||
60 | #define OMAP4430_CM1_MPU_MOD 0x0300 | ||
61 | #define OMAP4430_CM1_TESLA_MOD 0x0400 | ||
62 | #define OMAP4430_CM1_ABE_MOD 0x0500 | ||
63 | #define OMAP4430_CM1_RESTORE_MOD 0x0e00 | ||
64 | #define OMAP4430_CM1_INSTR_MOD 0x0f00 | ||
65 | |||
66 | /* CM2 instances */ | ||
67 | |||
68 | #define OMAP4430_CM2_OCP_SOCKET_MOD 0x0000 | ||
69 | #define OMAP4430_CM2_CKGEN_MOD 0x0100 | ||
70 | #define OMAP4430_CM2_ALWAYS_ON_MOD 0x0600 | ||
71 | #define OMAP4430_CM2_CORE_MOD 0x0700 | ||
72 | #define OMAP4430_CM2_IVAHD_MOD 0x0f00 | ||
73 | #define OMAP4430_CM2_CAM_MOD 0x1000 | ||
74 | #define OMAP4430_CM2_DSS_MOD 0x1100 | ||
75 | #define OMAP4430_CM2_GFX_MOD 0x1200 | ||
76 | #define OMAP4430_CM2_L3INIT_MOD 0x1300 | ||
77 | #define OMAP4430_CM2_L4PER_MOD 0x1400 | ||
78 | #define OMAP4430_CM2_CEFUSE_MOD 0x1600 | ||
79 | #define OMAP4430_CM2_RESTORE_MOD 0x1e00 | ||
80 | #define OMAP4430_CM2_INSTR_MOD 0x1f00 | ||
81 | |||
82 | /* PRM instances */ | ||
83 | |||
84 | #define OMAP4430_PRM_OCP_SOCKET_MOD 0x0000 | ||
85 | #define OMAP4430_PRM_CKGEN_MOD 0x0100 | ||
86 | #define OMAP4430_PRM_MPU_MOD 0x0300 | ||
87 | #define OMAP4430_PRM_TESLA_MOD 0x0400 | ||
88 | #define OMAP4430_PRM_ABE_MOD 0x0500 | ||
89 | #define OMAP4430_PRM_ALWAYS_ON_MOD 0x0600 | ||
90 | #define OMAP4430_PRM_CORE_MOD 0x0700 | ||
91 | #define OMAP4430_PRM_IVAHD_MOD 0x0f00 | ||
92 | #define OMAP4430_PRM_CAM_MOD 0x1000 | ||
93 | #define OMAP4430_PRM_DSS_MOD 0x1100 | ||
94 | #define OMAP4430_PRM_GFX_MOD 0x1200 | ||
95 | #define OMAP4430_PRM_L3INIT_MOD 0x1300 | ||
96 | #define OMAP4430_PRM_L4PER_MOD 0x1400 | ||
97 | #define OMAP4430_PRM_CEFUSE_MOD 0x1600 | ||
98 | #define OMAP4430_PRM_WKUP_MOD 0x1700 | ||
99 | #define OMAP4430_PRM_WKUP_CM_MOD 0x1800 | ||
100 | #define OMAP4430_PRM_EMU_MOD 0x1900 | ||
101 | #define OMAP4430_PRM_EMU_CM_MOD 0x1a00 | ||
102 | #define OMAP4430_PRM_DEVICE_MOD 0x1b00 | ||
103 | #define OMAP4430_PRM_INSTR_MOD 0x1f00 | ||
104 | |||
105 | /* SCRM instances */ | ||
106 | |||
107 | #define OMAP4430_SCRM_SCRM_MOD 0x0000 | ||
108 | |||
109 | /* CHIRONSS instances */ | ||
110 | |||
111 | #define OMAP4430_CHIRONSS_CHIRONSS_OCP_SOCKET_PRCM_MOD 0x0000 | ||
112 | #define OMAP4430_CHIRONSS_CHIRONSS_DEVICE_PRM_MOD 0x0200 | ||
113 | #define OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD 0x0400 | ||
114 | #define OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD 0x0800 | ||
52 | 115 | ||
53 | /* 24XX register bits shared between CM & PRM registers */ | 116 | /* 24XX register bits shared between CM & PRM registers */ |
54 | 117 | ||