diff options
author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-07-09 22:39:44 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2011-07-09 22:39:44 -0400 |
commit | 3a23aafcde66f6327bda0a6423586dfd8d694eb4 (patch) | |
tree | 896e73148371ce36c76319fb1e9ec49fb974a2c0 /arch/arm/mach-omap2 | |
parent | c402c0d9dfa8d4fb54dd98fc12525f39d0f29bfe (diff) |
OMAP4: hwmod data: Modify DSS opt clocks
Add missing DSS optional clocks to HWMOD data for OMAP4xxx.
Add HWMOD_CONTROL_OPT_CLKS_IN_RESET flag for dispc to fix dispc reset.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[b-cousson@ti.com: Remove a comment and update the subject]
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
[paul@pwsan.com: removed DSS "fck" role and some clkdev aliases at Tomi's
request]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/clock44xx_data.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 33 |
2 files changed, 37 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 044df38f65ce..7a0b112f2207 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c | |||
@@ -3032,10 +3032,10 @@ static struct omap_clk omap44xx_clks[] = { | |||
3032 | CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), | 3032 | CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), |
3033 | CLK(NULL, "dmic_fck", &dmic_fck, CK_443X), | 3033 | CLK(NULL, "dmic_fck", &dmic_fck, CK_443X), |
3034 | CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), | 3034 | CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), |
3035 | CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X), | 3035 | CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X), |
3036 | CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X), | 3036 | CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X), |
3037 | CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X), | 3037 | CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X), |
3038 | CLK("omapdss_dss", "fck", &dss_dss_clk, CK_443X), | 3038 | CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_443X), |
3039 | CLK("omapdss_dss", "ick", &dss_fck, CK_443X), | 3039 | CLK("omapdss_dss", "ick", &dss_fck, CK_443X), |
3040 | CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), | 3040 | CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), |
3041 | CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), | 3041 | CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), |
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index e01143725b08..a7fbe5cb81d3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -1267,9 +1267,16 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = { | |||
1267 | &omap44xx_l4_per__dss_dispc, | 1267 | &omap44xx_l4_per__dss_dispc, |
1268 | }; | 1268 | }; |
1269 | 1269 | ||
1270 | static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = { | ||
1271 | { .role = "sys_clk", .clk = "dss_sys_clk" }, | ||
1272 | { .role = "tv_clk", .clk = "dss_tv_clk" }, | ||
1273 | { .role = "hdmi_clk", .clk = "dss_48mhz_clk" }, | ||
1274 | }; | ||
1275 | |||
1270 | static struct omap_hwmod omap44xx_dss_dispc_hwmod = { | 1276 | static struct omap_hwmod omap44xx_dss_dispc_hwmod = { |
1271 | .name = "dss_dispc", | 1277 | .name = "dss_dispc", |
1272 | .class = &omap44xx_dispc_hwmod_class, | 1278 | .class = &omap44xx_dispc_hwmod_class, |
1279 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1273 | .mpu_irqs = omap44xx_dss_dispc_irqs, | 1280 | .mpu_irqs = omap44xx_dss_dispc_irqs, |
1274 | .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, | 1281 | .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, |
1275 | .main_clk = "dss_fck", | 1282 | .main_clk = "dss_fck", |
@@ -1278,6 +1285,8 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { | |||
1278 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | 1285 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, |
1279 | }, | 1286 | }, |
1280 | }, | 1287 | }, |
1288 | .opt_clks = dss_dispc_opt_clks, | ||
1289 | .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks), | ||
1281 | .slaves = omap44xx_dss_dispc_slaves, | 1290 | .slaves = omap44xx_dss_dispc_slaves, |
1282 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves), | 1291 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves), |
1283 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 1292 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
@@ -1358,6 +1367,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi1_slaves[] = { | |||
1358 | &omap44xx_l4_per__dss_dsi1, | 1367 | &omap44xx_l4_per__dss_dsi1, |
1359 | }; | 1368 | }; |
1360 | 1369 | ||
1370 | static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { | ||
1371 | { .role = "sys_clk", .clk = "dss_sys_clk" }, | ||
1372 | }; | ||
1373 | |||
1361 | static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { | 1374 | static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { |
1362 | .name = "dss_dsi1", | 1375 | .name = "dss_dsi1", |
1363 | .class = &omap44xx_dsi_hwmod_class, | 1376 | .class = &omap44xx_dsi_hwmod_class, |
@@ -1369,6 +1382,8 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { | |||
1369 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | 1382 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, |
1370 | }, | 1383 | }, |
1371 | }, | 1384 | }, |
1385 | .opt_clks = dss_dsi1_opt_clks, | ||
1386 | .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks), | ||
1372 | .slaves = omap44xx_dss_dsi1_slaves, | 1387 | .slaves = omap44xx_dss_dsi1_slaves, |
1373 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves), | 1388 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves), |
1374 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 1389 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
@@ -1428,6 +1443,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi2_slaves[] = { | |||
1428 | &omap44xx_l4_per__dss_dsi2, | 1443 | &omap44xx_l4_per__dss_dsi2, |
1429 | }; | 1444 | }; |
1430 | 1445 | ||
1446 | static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = { | ||
1447 | { .role = "sys_clk", .clk = "dss_sys_clk" }, | ||
1448 | }; | ||
1449 | |||
1431 | static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { | 1450 | static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { |
1432 | .name = "dss_dsi2", | 1451 | .name = "dss_dsi2", |
1433 | .class = &omap44xx_dsi_hwmod_class, | 1452 | .class = &omap44xx_dsi_hwmod_class, |
@@ -1439,6 +1458,8 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { | |||
1439 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | 1458 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, |
1440 | }, | 1459 | }, |
1441 | }, | 1460 | }, |
1461 | .opt_clks = dss_dsi2_opt_clks, | ||
1462 | .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks), | ||
1442 | .slaves = omap44xx_dss_dsi2_slaves, | 1463 | .slaves = omap44xx_dss_dsi2_slaves, |
1443 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves), | 1464 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves), |
1444 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 1465 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
@@ -1518,6 +1539,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_hdmi_slaves[] = { | |||
1518 | &omap44xx_l4_per__dss_hdmi, | 1539 | &omap44xx_l4_per__dss_hdmi, |
1519 | }; | 1540 | }; |
1520 | 1541 | ||
1542 | static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = { | ||
1543 | { .role = "sys_clk", .clk = "dss_sys_clk" }, | ||
1544 | }; | ||
1545 | |||
1521 | static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { | 1546 | static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { |
1522 | .name = "dss_hdmi", | 1547 | .name = "dss_hdmi", |
1523 | .class = &omap44xx_hdmi_hwmod_class, | 1548 | .class = &omap44xx_hdmi_hwmod_class, |
@@ -1529,6 +1554,8 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { | |||
1529 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | 1554 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, |
1530 | }, | 1555 | }, |
1531 | }, | 1556 | }, |
1557 | .opt_clks = dss_hdmi_opt_clks, | ||
1558 | .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), | ||
1532 | .slaves = omap44xx_dss_hdmi_slaves, | 1559 | .slaves = omap44xx_dss_hdmi_slaves, |
1533 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves), | 1560 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves), |
1534 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 1561 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
@@ -1603,6 +1630,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_rfbi_slaves[] = { | |||
1603 | &omap44xx_l4_per__dss_rfbi, | 1630 | &omap44xx_l4_per__dss_rfbi, |
1604 | }; | 1631 | }; |
1605 | 1632 | ||
1633 | static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { | ||
1634 | { .role = "ick", .clk = "dss_fck" }, | ||
1635 | }; | ||
1636 | |||
1606 | static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { | 1637 | static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { |
1607 | .name = "dss_rfbi", | 1638 | .name = "dss_rfbi", |
1608 | .class = &omap44xx_rfbi_hwmod_class, | 1639 | .class = &omap44xx_rfbi_hwmod_class, |
@@ -1613,6 +1644,8 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { | |||
1613 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | 1644 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, |
1614 | }, | 1645 | }, |
1615 | }, | 1646 | }, |
1647 | .opt_clks = dss_rfbi_opt_clks, | ||
1648 | .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), | ||
1616 | .slaves = omap44xx_dss_rfbi_slaves, | 1649 | .slaves = omap44xx_dss_rfbi_slaves, |
1617 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves), | 1650 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves), |
1618 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 1651 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |