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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2012-11-25 17:23:57 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2012-11-25 17:23:57 -0500
commit2a859ab07b6ab66f4134c4fffc341398bd3d328c (patch)
treec5e7eaf3bffbc18feb326940e39794328d98dc07 /arch/arm/mach-omap2
parentcedddd812a79a4fda3885a15711aee3de78c4a24 (diff)
parente716e014384688d1a50d1aa5213ee74748c6d4e0 (diff)
Merge branch 'merge' into next
Merge my own merge branch to get various fixes from there and upstream, especially the hvc console tty refcouting fixes which which testing is quite a bit harder...
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c22
-rw-r--r--arch/arm/mach-omap2/clock33xx_data.c2
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/clockdomain.c15
-rw-r--r--arch/arm/mach-omap2/devices.c2
-rw-r--r--arch/arm/mach-omap2/gpmc.c24
-rw-r--r--arch/arm/mach-omap2/mux34xx.c8
-rw-r--r--arch/arm/mach-omap2/pm.h1
-rw-r--r--arch/arm/mach-omap2/pm34xx.c30
-rw-r--r--arch/arm/mach-omap2/serial.c5
-rw-r--r--arch/arm/mach-omap2/timer.c2
12 files changed, 86 insertions, 28 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 2a1a898c7f90..d669e227e00c 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -11,7 +11,6 @@ config ARCH_OMAP2PLUS_TYPICAL
11 select I2C_OMAP 11 select I2C_OMAP
12 select MENELAUS if ARCH_OMAP2 12 select MENELAUS if ARCH_OMAP2
13 select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5 13 select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
14 select PINCTRL
15 select PM_RUNTIME 14 select PM_RUNTIME
16 select REGULATOR 15 select REGULATOR
17 select SERIAL_OMAP 16 select SERIAL_OMAP
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 388c431c745a..d41ab98890ff 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -24,6 +24,7 @@
24#include <linux/input.h> 24#include <linux/input.h>
25#include <linux/gpio_keys.h> 25#include <linux/gpio_keys.h>
26#include <linux/opp.h> 26#include <linux/opp.h>
27#include <linux/cpu.h>
27 28
28#include <linux/mtd/mtd.h> 29#include <linux/mtd/mtd.h>
29#include <linux/mtd/partitions.h> 30#include <linux/mtd/partitions.h>
@@ -444,27 +445,31 @@ static struct omap_board_mux board_mux[] __initdata = {
444}; 445};
445#endif 446#endif
446 447
447static void __init beagle_opp_init(void) 448static int __init beagle_opp_init(void)
448{ 449{
449 int r = 0; 450 int r = 0;
450 451
451 /* Initialize the omap3 opp table */ 452 if (!machine_is_omap3_beagle())
452 if (omap3_opp_init()) { 453 return 0;
454
455 /* Initialize the omap3 opp table if not already created. */
456 r = omap3_opp_init();
457 if (IS_ERR_VALUE(r) && (r != -EEXIST)) {
453 pr_err("%s: opp default init failed\n", __func__); 458 pr_err("%s: opp default init failed\n", __func__);
454 return; 459 return r;
455 } 460 }
456 461
457 /* Custom OPP enabled for all xM versions */ 462 /* Custom OPP enabled for all xM versions */
458 if (cpu_is_omap3630()) { 463 if (cpu_is_omap3630()) {
459 struct device *mpu_dev, *iva_dev; 464 struct device *mpu_dev, *iva_dev;
460 465
461 mpu_dev = omap_device_get_by_hwmod_name("mpu"); 466 mpu_dev = get_cpu_device(0);
462 iva_dev = omap_device_get_by_hwmod_name("iva"); 467 iva_dev = omap_device_get_by_hwmod_name("iva");
463 468
464 if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) { 469 if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) {
465 pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", 470 pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
466 __func__, mpu_dev, iva_dev); 471 __func__, mpu_dev, iva_dev);
467 return; 472 return -ENODEV;
468 } 473 }
469 /* Enable MPU 1GHz and lower opps */ 474 /* Enable MPU 1GHz and lower opps */
470 r = opp_enable(mpu_dev, 800000000); 475 r = opp_enable(mpu_dev, 800000000);
@@ -484,8 +489,9 @@ static void __init beagle_opp_init(void)
484 opp_disable(iva_dev, 660000000); 489 opp_disable(iva_dev, 660000000);
485 } 490 }
486 } 491 }
487 return; 492 return 0;
488} 493}
494device_initcall(beagle_opp_init);
489 495
490static void __init omap3_beagle_init(void) 496static void __init omap3_beagle_init(void)
491{ 497{
@@ -522,8 +528,6 @@ static void __init omap3_beagle_init(void)
522 /* Ensure SDRC pins are mux'd for self-refresh */ 528 /* Ensure SDRC pins are mux'd for self-refresh */
523 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); 529 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
524 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); 530 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
525
526 beagle_opp_init();
527} 531}
528 532
529MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") 533MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
index 114ab4b8e0e3..1a45d6bd2539 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -1073,6 +1073,8 @@ static struct omap_clk am33xx_clks[] = {
1073 CLK(NULL, "gfx_fck_div_ck", &gfx_fck_div_ck, CK_AM33XX), 1073 CLK(NULL, "gfx_fck_div_ck", &gfx_fck_div_ck, CK_AM33XX),
1074 CLK(NULL, "sysclkout_pre_ck", &sysclkout_pre_ck, CK_AM33XX), 1074 CLK(NULL, "sysclkout_pre_ck", &sysclkout_pre_ck, CK_AM33XX),
1075 CLK(NULL, "clkout2_ck", &clkout2_ck, CK_AM33XX), 1075 CLK(NULL, "clkout2_ck", &clkout2_ck, CK_AM33XX),
1076 CLK(NULL, "timer_32k_ck", &clkdiv32k_ick, CK_AM33XX),
1077 CLK(NULL, "timer_sys_ck", &sys_clkin_ck, CK_AM33XX),
1076}; 1078};
1077 1079
1078int __init am33xx_clk_init(void) 1080int __init am33xx_clk_init(void)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index d661d138f270..6efc30c961a5 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3294,7 +3294,7 @@ static struct omap_clk omap44xx_clks[] = {
3294 CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck, CK_443X), 3294 CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck, CK_443X),
3295 CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), 3295 CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X),
3296 CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), 3296 CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X),
3297 CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X), 3297 CLK("omap-gpmc", "fck", &dummy_ck, CK_443X),
3298 CLK("omap_i2c.1", "ick", &dummy_ck, CK_443X), 3298 CLK("omap_i2c.1", "ick", &dummy_ck, CK_443X),
3299 CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X), 3299 CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X),
3300 CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X), 3300 CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X),
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index cbb879139c51..512e79a842cb 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -925,15 +925,18 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm)
925 if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable) 925 if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable)
926 return -EINVAL; 926 return -EINVAL;
927 927
928 spin_lock_irqsave(&clkdm->lock, flags);
929
928 /* 930 /*
929 * For arch's with no autodeps, clkcm_clk_enable 931 * For arch's with no autodeps, clkcm_clk_enable
930 * should be called for every clock instance or hwmod that is 932 * should be called for every clock instance or hwmod that is
931 * enabled, so the clkdm can be force woken up. 933 * enabled, so the clkdm can be force woken up.
932 */ 934 */
933 if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) 935 if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) {
936 spin_unlock_irqrestore(&clkdm->lock, flags);
934 return 0; 937 return 0;
938 }
935 939
936 spin_lock_irqsave(&clkdm->lock, flags);
937 arch_clkdm->clkdm_clk_enable(clkdm); 940 arch_clkdm->clkdm_clk_enable(clkdm);
938 pwrdm_state_switch(clkdm->pwrdm.ptr); 941 pwrdm_state_switch(clkdm->pwrdm.ptr);
939 spin_unlock_irqrestore(&clkdm->lock, flags); 942 spin_unlock_irqrestore(&clkdm->lock, flags);
@@ -950,15 +953,19 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm)
950 if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable) 953 if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable)
951 return -EINVAL; 954 return -EINVAL;
952 955
956 spin_lock_irqsave(&clkdm->lock, flags);
957
953 if (atomic_read(&clkdm->usecount) == 0) { 958 if (atomic_read(&clkdm->usecount) == 0) {
959 spin_unlock_irqrestore(&clkdm->lock, flags);
954 WARN_ON(1); /* underflow */ 960 WARN_ON(1); /* underflow */
955 return -ERANGE; 961 return -ERANGE;
956 } 962 }
957 963
958 if (atomic_dec_return(&clkdm->usecount) > 0) 964 if (atomic_dec_return(&clkdm->usecount) > 0) {
965 spin_unlock_irqrestore(&clkdm->lock, flags);
959 return 0; 966 return 0;
967 }
960 968
961 spin_lock_irqsave(&clkdm->lock, flags);
962 arch_clkdm->clkdm_clk_disable(clkdm); 969 arch_clkdm->clkdm_clk_disable(clkdm);
963 pwrdm_state_switch(clkdm->pwrdm.ptr); 970 pwrdm_state_switch(clkdm->pwrdm.ptr);
964 spin_unlock_irqrestore(&clkdm->lock, flags); 971 spin_unlock_irqrestore(&clkdm->lock, flags);
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c8c211731d26..cba60e05e32e 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -341,7 +341,7 @@ static void __init omap_init_dmic(void)
341 341
342 oh = omap_hwmod_lookup("dmic"); 342 oh = omap_hwmod_lookup("dmic");
343 if (!oh) { 343 if (!oh) {
344 printk(KERN_ERR "Could not look up mcpdm hw_mod\n"); 344 pr_err("Could not look up dmic hw_mod\n");
345 return; 345 return;
346 } 346 }
347 347
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 5ac5cf30406a..92b5718fa722 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -868,9 +868,9 @@ static void __devexit gpmc_mem_exit(void)
868 868
869} 869}
870 870
871static void __devinit gpmc_mem_init(void) 871static int __devinit gpmc_mem_init(void)
872{ 872{
873 int cs; 873 int cs, rc;
874 unsigned long boot_rom_space = 0; 874 unsigned long boot_rom_space = 0;
875 875
876 /* never allocate the first page, to facilitate bug detection; 876 /* never allocate the first page, to facilitate bug detection;
@@ -890,13 +890,21 @@ static void __devinit gpmc_mem_init(void)
890 if (!gpmc_cs_mem_enabled(cs)) 890 if (!gpmc_cs_mem_enabled(cs))
891 continue; 891 continue;
892 gpmc_cs_get_memconf(cs, &base, &size); 892 gpmc_cs_get_memconf(cs, &base, &size);
893 if (gpmc_cs_insert_mem(cs, base, size) < 0) 893 rc = gpmc_cs_insert_mem(cs, base, size);
894 BUG(); 894 if (IS_ERR_VALUE(rc)) {
895 while (--cs >= 0)
896 if (gpmc_cs_mem_enabled(cs))
897 gpmc_cs_delete_mem(cs);
898 return rc;
899 }
895 } 900 }
901
902 return 0;
896} 903}
897 904
898static __devinit int gpmc_probe(struct platform_device *pdev) 905static __devinit int gpmc_probe(struct platform_device *pdev)
899{ 906{
907 int rc;
900 u32 l; 908 u32 l;
901 struct resource *res; 909 struct resource *res;
902 910
@@ -936,7 +944,13 @@ static __devinit int gpmc_probe(struct platform_device *pdev)
936 dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), 944 dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l),
937 GPMC_REVISION_MINOR(l)); 945 GPMC_REVISION_MINOR(l));
938 946
939 gpmc_mem_init(); 947 rc = gpmc_mem_init();
948 if (IS_ERR_VALUE(rc)) {
949 clk_disable_unprepare(gpmc_l3_clk);
950 clk_put(gpmc_l3_clk);
951 dev_err(gpmc_dev, "failed to reserve memory\n");
952 return rc;
953 }
940 954
941 if (IS_ERR_VALUE(gpmc_setup_irq())) 955 if (IS_ERR_VALUE(gpmc_setup_irq()))
942 dev_warn(gpmc_dev, "gpmc_setup_irq failed\n"); 956 dev_warn(gpmc_dev, "gpmc_setup_irq failed\n");
diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c
index 17f80e4ab162..c47140bbbec4 100644
--- a/arch/arm/mach-omap2/mux34xx.c
+++ b/arch/arm/mach-omap2/mux34xx.c
@@ -614,16 +614,16 @@ static struct omap_mux __initdata omap3_muxmodes[] = {
614 "sys_off_mode", NULL, NULL, NULL, 614 "sys_off_mode", NULL, NULL, NULL,
615 "gpio_9", NULL, NULL, "safe_mode"), 615 "gpio_9", NULL, NULL, "safe_mode"),
616 _OMAP3_MUXENTRY(UART1_CTS, 150, 616 _OMAP3_MUXENTRY(UART1_CTS, 150,
617 "uart1_cts", NULL, NULL, NULL, 617 "uart1_cts", "ssi1_rdy_tx", NULL, NULL,
618 "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"), 618 "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"),
619 _OMAP3_MUXENTRY(UART1_RTS, 149, 619 _OMAP3_MUXENTRY(UART1_RTS, 149,
620 "uart1_rts", NULL, NULL, NULL, 620 "uart1_rts", "ssi1_flag_tx", NULL, NULL,
621 "gpio_149", NULL, NULL, "safe_mode"), 621 "gpio_149", NULL, NULL, "safe_mode"),
622 _OMAP3_MUXENTRY(UART1_RX, 151, 622 _OMAP3_MUXENTRY(UART1_RX, 151,
623 "uart1_rx", NULL, "mcbsp1_clkr", "mcspi4_clk", 623 "uart1_rx", "ss1_wake_tx", "mcbsp1_clkr", "mcspi4_clk",
624 "gpio_151", NULL, NULL, "safe_mode"), 624 "gpio_151", NULL, NULL, "safe_mode"),
625 _OMAP3_MUXENTRY(UART1_TX, 148, 625 _OMAP3_MUXENTRY(UART1_TX, 148,
626 "uart1_tx", NULL, NULL, NULL, 626 "uart1_tx", "ssi1_dat_tx", NULL, NULL,
627 "gpio_148", NULL, NULL, "safe_mode"), 627 "gpio_148", NULL, NULL, "safe_mode"),
628 _OMAP3_MUXENTRY(UART2_CTS, 144, 628 _OMAP3_MUXENTRY(UART2_CTS, 144,
629 "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL, 629 "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL,
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 686137d164da..67d66131cfa7 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -91,6 +91,7 @@ extern void omap3_save_scratchpad_contents(void);
91 91
92#define PM_RTA_ERRATUM_i608 (1 << 0) 92#define PM_RTA_ERRATUM_i608 (1 << 0)
93#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1) 93#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
94#define PM_PER_MEMORIES_ERRATUM_i582 (1 << 2)
94 95
95#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) 96#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
96extern u16 pm34xx_errata; 97extern u16 pm34xx_errata;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index ba670db1fd37..3a904de4313e 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -652,14 +652,17 @@ static void __init pm_errata_configure(void)
652 /* Enable the l2 cache toggling in sleep logic */ 652 /* Enable the l2 cache toggling in sleep logic */
653 enable_omap3630_toggle_l2_on_restore(); 653 enable_omap3630_toggle_l2_on_restore();
654 if (omap_rev() < OMAP3630_REV_ES1_2) 654 if (omap_rev() < OMAP3630_REV_ES1_2)
655 pm34xx_errata |= PM_SDRC_WAKEUP_ERRATUM_i583; 655 pm34xx_errata |= (PM_SDRC_WAKEUP_ERRATUM_i583 |
656 PM_PER_MEMORIES_ERRATUM_i582);
657 } else if (cpu_is_omap34xx()) {
658 pm34xx_errata |= PM_PER_MEMORIES_ERRATUM_i582;
656 } 659 }
657} 660}
658 661
659int __init omap3_pm_init(void) 662int __init omap3_pm_init(void)
660{ 663{
661 struct power_state *pwrst, *tmp; 664 struct power_state *pwrst, *tmp;
662 struct clockdomain *neon_clkdm, *mpu_clkdm; 665 struct clockdomain *neon_clkdm, *mpu_clkdm, *per_clkdm, *wkup_clkdm;
663 int ret; 666 int ret;
664 667
665 if (!omap3_has_io_chain_ctrl()) 668 if (!omap3_has_io_chain_ctrl())
@@ -711,6 +714,8 @@ int __init omap3_pm_init(void)
711 714
712 neon_clkdm = clkdm_lookup("neon_clkdm"); 715 neon_clkdm = clkdm_lookup("neon_clkdm");
713 mpu_clkdm = clkdm_lookup("mpu_clkdm"); 716 mpu_clkdm = clkdm_lookup("mpu_clkdm");
717 per_clkdm = clkdm_lookup("per_clkdm");
718 wkup_clkdm = clkdm_lookup("wkup_clkdm");
714 719
715#ifdef CONFIG_SUSPEND 720#ifdef CONFIG_SUSPEND
716 omap_pm_suspend = omap3_pm_suspend; 721 omap_pm_suspend = omap3_pm_suspend;
@@ -727,6 +732,27 @@ int __init omap3_pm_init(void)
727 if (IS_PM34XX_ERRATUM(PM_RTA_ERRATUM_i608)) 732 if (IS_PM34XX_ERRATUM(PM_RTA_ERRATUM_i608))
728 omap3630_ctrl_disable_rta(); 733 omap3630_ctrl_disable_rta();
729 734
735 /*
736 * The UART3/4 FIFO and the sidetone memory in McBSP2/3 are
737 * not correctly reset when the PER powerdomain comes back
738 * from OFF or OSWR when the CORE powerdomain is kept active.
739 * See OMAP36xx Erratum i582 "PER Domain reset issue after
740 * Domain-OFF/OSWR Wakeup". This wakeup dependency is not a
741 * complete workaround. The kernel must also prevent the PER
742 * powerdomain from going to OSWR/OFF while the CORE
743 * powerdomain is not going to OSWR/OFF. And if PER last
744 * power state was off while CORE last power state was ON, the
745 * UART3/4 and McBSP2/3 SIDETONE devices need to run a
746 * self-test using their loopback tests; if that fails, those
747 * devices are unusable until the PER/CORE can complete a transition
748 * from ON to OSWR/OFF and then back to ON.
749 *
750 * XXX Technically this workaround is only needed if off-mode
751 * or OSWR is enabled.
752 */
753 if (IS_PM34XX_ERRATUM(PM_PER_MEMORIES_ERRATUM_i582))
754 clkdm_add_wkdep(per_clkdm, wkup_clkdm);
755
730 clkdm_add_wkdep(neon_clkdm, mpu_clkdm); 756 clkdm_add_wkdep(neon_clkdm, mpu_clkdm);
731 if (omap_type() != OMAP2_DEVICE_TYPE_GP) { 757 if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
732 omap3_secure_ram_storage = 758 omap3_secure_ram_storage =
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 0405c8190803..a507cd6cf4f1 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -329,6 +329,11 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
329 329
330 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); 330 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
331 331
332 if (console_uart_id == bdata->id) {
333 omap_device_enable(pdev);
334 pm_runtime_set_active(&pdev->dev);
335 }
336
332 oh->dev_attr = uart; 337 oh->dev_attr = uart;
333 338
334 if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads) 339 if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads)
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 44f9aa7ec0c0..69e46631a7cd 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -467,7 +467,7 @@ OMAP_SYS_TIMER(3_am33xx)
467#ifdef CONFIG_ARCH_OMAP4 467#ifdef CONFIG_ARCH_OMAP4
468#ifdef CONFIG_LOCAL_TIMERS 468#ifdef CONFIG_LOCAL_TIMERS
469static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 469static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
470 OMAP44XX_LOCAL_TWD_BASE, 29 + OMAP_INTC_START); 470 OMAP44XX_LOCAL_TWD_BASE, 29);
471#endif 471#endif
472 472
473static void __init omap4_timer_init(void) 473static void __init omap4_timer_init(void)